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. 2014 Apr 25;1(1):15. doi: 10.1186/s40580-014-0015-5

Table 2.

Device performance of various CNTs and graphene FETs

Channel Preparation method Transistor structure Gate dielectric Gate length (μm) Carrier type On/Off ratio Mobility (cm 2 /Vs)
Single CNT [32] CVD on quartz Back gate SiO2 5 p-type 105 636(C)
Aligned CNTs [32] Electrical breakdown Back gate HfO2 12 p-type 2 → 104 570(C) → 200(C)
Random network CNTs [149] Channel cutting Top gate HfO2 100 p-type 10 → 104 200(C) → 80(C)
Random network CNTs [153] 97% separated CNTs Back gate SiO2 20 p-type 104 20(p)
Random network CNTs [181] Viologen doped CNTs Back gate HfO2 9 p → n-type 103 2(p)
Exfoliated graphene [141] Monolayer graphene Back gate SiO2 4 Ambipolar 10 10,000(p)
CVD grown graphene [195] Monolayer graphene Back gate SiO2 5 Ambipolar 10 1,100(p)
Exfoliated graphene [158] Bilayer graphene Dual gate SiO2 (Back) HfO2 (Top) 1.6 Ambipolar 5 → 100 -
Graphene nanoribbon [162] 16 →6 nm nanoribbon Back gate SiO2 0.25 Ambipolar → p-type 1.5 → 100 -

p: Parallel plate Model, c: Cylindrical Model, h: Hole Mobility, e: Electron Mobility.