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. 2017 Nov 2;13(11):e1005796. doi: 10.1371/journal.pcbi.1005796

Fig 1. Connectionist diagram of RWDDM.

Fig 1

Each CS unit is connected to a summing junction (labelled Σ) via a modifiable link V. The output of the summing junction is the CR. The US is represented as a teaching signal with a fixed weight H. Each CS unit has its own timer Ψ and representation x. The bottom panel shows a zoomed-in view of the timer Ψl and CS representation xl associated with CSl. The timer slope Al is tuned to a 5-second CS duration.