Figure 2.

(a) Experimentally determined D and calculated ${\sigma }_0$ and ${\sigma }_{int}$ hysteresis loops at a peak voltage of ±3.5 kV for a 350 µm thick array fabricated from tubes of 50 µm thick walls and having a geometric capacitance C_S of 12 pF, (b) ${\sigma }_{int}$ hysteresis loops recorded for the same specimen for different peak voltages as indicated. The measurements were carried out at a frequency of 1 Hz.