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. Author manuscript; available in PMC: 2018 Oct 1.
Published in final edited form as: IEEE Trans Ultrason Ferroelectr Freq Control. 2017 Aug 14;64(10):1542–1557. doi: 10.1109/TUFFC.2017.2739649

Fig. 1.

Fig. 1

(Top) The electrical schematic for the capacitor array, including parasitic values for the capacitors. The array is connected between high-voltage (VDC) and ground. The multiplier above each series RLC indicates the number of parallel units used in the full array. (Bottom) A schematic of one unit of the amplifier system. The complete amplifier comprises 8 channels and each channel consists of 4 identical units in parallel between the input signals (Vn, Vp) and the output to the load.