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. 2018 Jan 24;65(8):2431–2442. doi: 10.1109/TCSI.2018.2792219

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1549-8328 © 2018. This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see http://creativecommons.org/licenses/by/4.0/

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Fig. 6. — (a) Circuit schematic of stimulation control block. signals determine the operation status of emitters. Read signal monitors the real-time working state saved by PWM unit. (b) A circuit schematic of diagnostic sensing block. Set_Pulse and Reset_Pulse generate pulse signals to achieve voltage scanning. Set_ADC determines the timing control of the ADC to fetch the . (TG is short for transmission gate). (c) Circuit schematic of the pulse width modulated DAC. This DAC performs two operations: mode selection and time-to-voltage conversion. (d) The diagnostic sensing element. Left is a (non-OTA) transconductance amplifier which feeds current into a simple ADC (right). This consists of three stages: current buffering, integration, and reset/pulse control.

Inline graphic — (a) Circuit schematic of stimulation control block. signals determine the operation status of emitters. Read signal monitors the real-time working state saved by PWM unit. (b) A circuit schematic of diagnostic sensing block. Set_Pulse and Reset_Pulse generate pulse signals to achieve voltage scanning. Set_ADC determines the timing control of the ADC to fetch the . (TG is short for transmission gate). (c) Circuit schematic of the pulse width modulated DAC. This DAC performs two operations: mode selection and time-to-voltage conversion. (d) The diagnostic sensing element. Left is a (non-OTA) transconductance amplifier which feeds current into a simple ADC (right). This consists of three stages: current buffering, integration, and reset/pulse control.