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. 2016 Sep 8;7(9):160. doi: 10.3390/mi7090160

Figure 20.

Figure 20

Fabrication of narrow gaps in a silicon-on-insulator-based process using polysilicon refilling of the gaps etched into the silicon device layer by Deep Reactive Ion Etching: (a) Conformal growth of sacrificial oxide to define lateral gaps; (b) Growth, etch back and patterning of polysilicon electrodes; (c) Release of silicon structure after removal of sacrificial oxide.