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. Author manuscript; available in PMC: 2019 Nov 6.
Published in final edited form as: Lab Chip. 2018 Nov 6;18(22):3501–3506. doi: 10.1039/c8lc00956b

Figure 2. Self-digitization chip.

Figure 2.

(A) Schematic of SD chip. A 16 × 64 array of 6.5 nL microwells connected by channels is embedded in PDMS and covered with a PDMS-coated glass slide. (B) Photograph of SD chip. Enlarged area shows a section of the microwell array.