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. 2014 Oct 23;7:35–41. doi: 10.1007/s40820-014-0016-2

Fig. 1.

Fig. 1

a Optical and b FE-SEM images of p-type Si NW FET devices; c four probe measurements and d hysteresis behaviors for a back-gate Si NW FET during the gate voltage scan from +5 to −5 V, +10 to −10 V, and back