Fig. 3.

Circuit architecture. a, Circuits architecture of the 96-sensor array chip with the integrated pixels, control and readout circuitry, nanoplasmonic filters and optical shield, all co-designed in a single IC. b,c,d, Layout and schematic of a single sensing pixel. The photo-detection is enabled in each pixel with 80 sensing diodes at the center measured differentially with respect to symmetrically placed and shielded 80 reference diodes to suppress common-mode dark currents. The signals are process with differential CTIA. Each photodiode is implemented using nwell-psub structure and each pixel measures 100μm in each dimension.