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. 2018 Nov 19;10(5):1442–1449. doi: 10.1039/c8sc04887h

Fig. 3. (a) Schematic diagram of the cascade AND logic circuitry. (b) The histograms show the FA/FD under different situations. Error bars represent the standard deviation from three independent measurements. The inset shows the truth table based on the input–output signal correlation pattern. “1” and “0” represent the presence and absence of miR-122 or miR-21, respectively.

Fig. 3