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. 2019 Mar 25;9:5081. doi: 10.1038/s41598-019-41508-3

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© The Author(s) 2019

Open Access This article is licensed under a Creative Commons Attribution 4.0 International License, which permits use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license, and indicate if changes were made. The images or other third party material in this article are included in the article’s Creative Commons license, unless indicated otherwise in a credit line to the material. If material is not included in the article’s Creative Commons license and your intended use is not permitted by statutory regulation or exceeds the permitted use, you will need to obtain permission directly from the copyright holder. To view a copy of this license, visit http://creativecommons.org/licenses/by/4.0/.

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(a) Experimental device retention as a function of SiO₂ thickness (2 different regions are observed); (b) Simulated E-d₂ characteristics in Pt/LiCoO₂/SiO₂/Si stacks without an external voltage (d₂ ≤ 10 nm); (c) Simulated E-d₂ characteristic in Pt/LiCoO₂/SiO₂/Si stacks without an external voltage (10 nm < d₂ ≤ 40 nm)