Table 7.

Cache misses of parallel DL distance algorithms, in millions, on Xeon4

A	B	PP_DL	PP_LS_DL	PP_Strip_DL	L vs D	S vs D	S vs L
40000	40000	259	235	3	9.2%	99.0%	98.9%
80000	80000	1417	500	6	64.7%	99.6%	98.8%
120000	120000	4746	1857	24	60.9%	99.5%	98.7%
160000	160000	**	4028	26			99.4%
200000	200000	**	6243	43			99.3%
240000	240000	**	9101	66			99.3%
280000	280000	**	12,636	112			99.1%
320000	320000	**	16,267	202			98.8%
360000	360000	**	40,741	1020			97.5%
400000	400000	**	66,469	1644			97.5%