Fig. 2.

Calculated $\frac{\nabla {\left|\stackrel{\rightharpoonup }{E}\right|}^2}{E^2}\cdot \stackrel{\rightharpoonup }{E}$ (e_c) values in the DC-iDEP device. (A) e_c intensity along centerline (see Figure 1) in the microchannel. Position along centerline started from the beginning of the sawtooth design to the end of the last (narrowest) gate. Peak-valley pairs correspond to e_c value distributions about each gate. The e_c value was positive on the left side of the gate tip and negative on the right side of the gate tip. (B) Effect of gate pitch on e_c. Values increase as gate pitch size decreases from the inlet to the outlet in the microchannel. The voltage is modeled at 90 V applied global voltage.