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. 2019 Oct 10;9:14618. doi: 10.1038/s41598-019-51039-6

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© The Author(s) 2019

Open Access This article is licensed under a Creative Commons Attribution 4.0 International License, which permits use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license, and indicate if changes were made. The images or other third party material in this article are included in the article’s Creative Commons license, unless indicated otherwise in a credit line to the material. If material is not included in the article’s Creative Commons license and your intended use is not permitted by statutory regulation or exceeds the permitted use, you will need to obtain permission directly from the copyright holder. To view a copy of this license, visit http://creativecommons.org/licenses/by/4.0/.

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Clocking scheme for a full adder. Each line corresponds to a step in the full adder, with the exception of simulation requirements for loading and transferring data (marked by–). Each step provides the operation that is performed, including the memristive switches that are part of the computation. The result of the operation is shown for each memristive switch, and if there is no value in a cell, it is assumed that the memristive switch maintains its previous state. SET operations are yellow, FALSE operations are violet, COPY operations are light green, IMP operations are green and ORNOR operations are dark green.