Table 1.
Name | Input Size | Kernel | Stride | Output Size |
---|---|---|---|---|
conv2d1 | 64 × 64 × 6 | 3 × 3 | 1 | 64 × 64 × 24 |
pool1 | 64 × 64 × 24 | - | 2 | 32 × 32 × 24 |
conv2d2 | 32 × 32 × 24 | 3 × 3 | 1 | 32 × 32 × 48 |
pool2 | 32 × 32 × 48 | - | 2 | 16 × 16 × 48 |
conv2d3 | 16 × 16 × 48 | 3 × 3 | 1 | 16 × 16 × 96 |
pool3 | 16 × 16 × 96 | - | 2 | 8 × 8 × 96 |
conv2d4 | 8 × 8 × 96 | 3 × 3 | 1 | 8 × 8 × 96 |
pool4 | 8 × 8 × 96 | - | 2 | 4 × 4 × 96 |