Fig. 1.

Concept of hybrid electronics systems combining printed electronics and silicon chips. a Application-specific integrated circuits (ASIC) require a large number of pads to implement multiple functionalities. Printed digital circuits can significantly reduce the number of pads, hence, the twinning of printed electronics and Si-based electronics into hybrid electronics systems enable ultra-low-cost applications. b The non-linear growths of ASIC chip processing cost and required chip area as the number of pads increases; the cost and area estimations are based on an 8-inch silicon wafer at a processing cost of 1500 US$, a pad area of 0.01 mm² and a pad pitch of 0.15 mm