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. 2020 Jan 20;10:658. doi: 10.1038/s41598-019-57310-0

Figure 4.

Figure 4

J-V analysis of the p(i)n test structures. (a) J-V curves of p(i)n diodes with different width of the (i) poly-Si region. The MPP and Jrec refer to the record solar cell with an initially 30 µm-wide intrinsic region. (b) Current per cell area J through the p(i)n diodes at a voltage of 0.64 V (representative for the maximum power point of our solar cells) as a function of the designated width of the intrinsic region. The different colors indicate three identical test structures on different wafers.