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. 2020 Feb 13;10:2567. doi: 10.1038/s41598-020-59121-0

Table 3.

Two-input NOR logic Gate truth-table using our 2T-1R SLIM methodology.

Variables Stored Memory state: 1 Stored Memory state: 0
a b Device state Logic output Device state Logic output
Initial Final Initial Final
0 0 11 11 1 01 01 1
0 1 11 10 0 01 00 0
1 0 11 10 0 01 00 0
1 1 11 10 0 01 00 0