Figure 1:

a) Schematic layout of the wafer-bonded sample stack. b) Schematic GaAs-Si₃N₄ device design: The preselected InAs QD is hosted in a GaAs nanowaveguide that collects the QD’s emission. The emission is then coupled into the Si₃N₄-SiO₂ WG using mode transformers. c) - e): Visualization of key sample fabrication steps: c) in situ EBL of a GaAs nanowaveguide pattern and markers aligned to a QD which was preselected using low temperature CL spectroscopy. d) GaAs nanowaveguide and markers on Si₃N₄ after etching the GaAs patterns and removing excess GaAs. e) fully-fabricated GaAs-Si₃N₄-SiO₂ WG device. f) false-color optical micrograph of fully-fabricated device QD 1. g) false-color SEM image of device QD 1, showing the GaAs WG taper (yellow) and the Si₃N₄ WG (pink).