Table 2.
Comparison between different topologies of neural amplifiers.
| Amplifier Topology | Figure | Ref. | Pros | Cons |
|---|---|---|---|---|
| CFN | 3a | [34] | Accurate gain, suitable for multistage amplifier | Large cap. area to obtain high gain |
| CFN with T-network | 3b | [40] | Input and total cap. reduction | Low-cutoff frequency increase |
| Electrode cap. and resistive feedback | 3c | [41] | No need to input cap. | Inaccurate and not adjustable high pass pole |
| OLN | 3d | [43] | Small input cap. area | Inaccurate gain |
| CAFN | 3e | [16,44] | Smaller total cap. area compared to CFN | Higher power consumption and noise compared to CFN |
| MCCFN | 3f | [45,46] | Higher swing as a single stage high gain amplifier compared to CFN | Higher power consumption compared to CFN, Higher area consumption compared to multistage CFN |
| Analog Integrator | 4a | [48] | Elimination of input cap. | Inaccurate gain and Low-cutoff frequency, Large power consumption |
| Differential difference amplifier | 4b | [49] | Elimination of input cap. | Inaccurate gain and Low-cutoff frequency, large off-chip passive components |
| Analog & digital DSL | 4c | [8,50] | Relax analog DSL requirement due to digital DSL | Large area and power consumption |
| Differential pair width modulation | 4d | [51,52] | Fully-digital DC offset rejection | IRN and CMRR variation with input offset variation, complexity overhead |
| Fully-digital DSL | 11 | [15] | Fully-digital DC offset rejection | Inaccurate gain, high power consumption and NEF |