Table 2.

Overheads of the fully-connected SNNs with on-chip ST-DFA-2 implemented on Xilinx ZC706 board.

MNIST (14 × 14 input resolution) @100 MHz
	Resource utilization			Training power (mW)	Training latency (mS)	Training energy (mJ)
	LUTs	FFs	DSPs
196-50-10	33484	6836	60	113	3.998	0.452
196-50-50-10	62989	12516	110	125	4.836	0.604
196-100-10	73027	12329	110	224	4.802	1.076
196-100-100-10	126482	23331	210	275	6.445	1.772
TI46 (16-speaker Spoken English Letters) @100 MHz
	Resource utilization			Training power (mW)	Training latency (mS)	Training energy (mJ)
	LUTs	FFs	DSPs
78-50-26	38220	8826	76	73	3.688	0.269
78-50-50-26	74709	14641	126	87	5.123	0.445
78-100-26	64280	14096	126	113	5.089	0.575
78-100-100-26	145452	30546	226	185	7.929	1.467