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. Author manuscript; available in PMC: 2020 Jul 7.
Published in final edited form as: IEEE Trans Reliab. 2018 Aug 7;68(1):248–266. doi: 10.1109/tr.2018.2835140

TABLE V.

Geometry Definitions for Finite-Element Analysis

Parameter Variable Value [in] Source
Board layers layers 14 Design
Board stack-up t_stackup 0.124 Calculated from below parameters
Dielectric thickness t_dielectric 0.0076 Microsection
Hole diameter hole_diameter 0.012 Design (nominal value)
Cap plating thickness t_cap 0.003 Microsection
Wrap plating thickness t_wrap 0.0005 IPC-6012B 3/A
Barrel plating thickness t_barrel 0.0017 Microsection
External foil thickness t_extfoil 0.0007 Microsection
Internal foil thickness t_intfoil 0.0014 Microsection
Annular ring/pad size EAR 0.0155*8 Design, 20% reduction per IPC-6012B 3/A
Etchback etchback 0.00035 Microsection