Figure 6. Integrating the flip-flop models with the central complex path integrator.

A: Schematic of the integrated network. The path integrator receives compass input via CL1a neurons, and speed input via TN neurons. TB1 neurons compute the current heading direction. CPU4 and pontine (Pon) neurons form a memory loop which integrates the current heading direction with the current speed, resulting in a vector that points to the path’s origin. When the agent wants to return home, CPU1 neurons compare the current heading (represented in TB1 neurons) to the desired heading given by the CPU4 home vector. CPU1 neuron output is then fed directly into the flip-flop networks, with the same input driving both the inhibitory protocerebral bilateral neurons (PBN) and the flip-flop neurons (FF). B: Example paths of the path integrator without a steering network (ideal), with the rate-based model, and with the spiking model. C: Success rate of the integrated models compared to the ideal path integrator. The success probability of both models increases when the CPU1 output is rescaled to a range of 0 to 1. Error bars represent the bootstrapped 95 % confidence interval around the median. D: Proportion of time the models spend at a certain angle relative to the path’s origin. E: With rescaled input, the distribution of the rate-based model becomes almost identical to that of the ideal path integrator. F: With rescaled input, the distribution of the spiking model has a smaller spread around 0° and becomes more similar to the ideal path integrator. N = 50 for all path integrator experiments. Only successful trials were considered in D-F.