Skip to main content
. Author manuscript; available in PMC: 2023 Aug 10.
Published in final edited form as: J Vis Exp. 2020 May 28;(159):10.3791/61132. doi: 10.3791/61132

Table 1. Plan layout for a multi-array chip.

The table above shows a simple layout that can be utilized when planning a multi-array chip run. On the left are the spaces that should be filled with the primer targets of interest and on the right are spaces that should be filled with the samples of interest. Each assay and sample array is paired number-wise through the chip.

Primers Samples
Assay 1 Sample 1
Assay 2 Sample 2
Assasy 3 Sample 3
Assay 4 Sample 4
Assay 5 Sample 5
Assay 6 Sample 6