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. 2021 May 25;12:3095. doi: 10.1038/s41467-021-23342-2

Table 3.

Comparison of the hardware setup proposed with analogous state-of-the-art designs and methods.

Feature/Design This work Burello et al.63 Feng et al.64 Van Helleputte et al.65 Yoo et al.66
Analog Headstage 8 ch + 32 filters No No 3 ch ECG + ETI 8 ch + 8 filters
Encoding Asynchronous delta-encoding Synchronous local binary pattern External ADC @173.61S/s/@256S/s Sigma-delta ADC @500S/s Multiplexed SAR ADC @32KS/s
Application HFO detection Seizure detection Seizure detection Personal health monitoring Seizure classification
Power consumption (headstage+processor) 58.4 uW + 555.6 uW 64 mW* 45 mW*** 183 uW + 191 uW** 66 uW + 2.03 uJ / classification
Platform Custom analog + DYNAP Nvidia Tegra X2 Altera Cyclone II FPGA Custom analog+ ARM CortexM0 Custom
Learning/Processing SNN, randomized dataset Hyperdimensional vectors, specific dataset SVM, both randomized and specific datasets ICA, PCA, CWT and feature extraction SVM, specific dataset

* Power for processing 24 channels.

** Power measured for R-peak detection with motion artefact reduction.

*** Not multichannel.