Skip to main content
. 2021 Jun 18;12:3733. doi: 10.1038/s41467-021-23436-x

Fig. 2. Device fabrication.

Fig. 2

a Assembly of hBN/SLG/hBN. b Stack placement on photonic circuit and interface cleaning. c hBN etching in SF6 plasma. d SLG etching in O2 plasma to define channel geometry. e Metallization (Cr/Au) for drain-source contacts. f Al seed layer evaporation and ALD of Al2O3. g Wet transfer of CVD SLG. h Split-gate fabrication. i Metallization (Cr/Au) for gate contacts.