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. 2021 Aug 2;8(4):ENEURO.0059-21.2021. doi: 10.1523/ENEURO.0059-21.2021

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Copyright © 2021 Oláh et al.

This is an open-access article distributed under the terms of the Creative Commons Attribution 4.0 International license, which permits unrestricted use, distribution and reproduction in any medium provided that the original work is properly attributed.

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Figure 1. — Model amplifier. Schematic circuit diagram of the model amplifier. The current clamp circuit (CC) consisted of a current source (ISOURCE), an idealized voltage buffer (A), capacitance neutralization (CPN), and bridge balance (BB) circuits. The voltage clamp circuit (VC) consisted of a resistive feedback amplifier with dual capacitance compensation (CP) and the high-frequency boost circuit (HFB). Outputs of the two amplifier modules are connected to a low-pass filter circuit (BF). The test configurations used to characterize the implemented amplifier components are shown in Extended Data Figure 1-1.