Electronically reconfigurable complex oxide heterostructure freestanding membranes

Freestanding membranes of electronically reconfigurable complex oxide heterostructure are demonstrated.

Abstract

In recent years, lanthanum aluminate/strontium titanate (LAO/STO) heterointerfaces have been used to create a growing family of nanoelectronic devices based on nanoscale control of LAO/STO metal-to-insulator transition. The properties of these devices are wide-ranging, but they are restricted by nature of the underlying thick STO substrate. Here, single-crystal freestanding membranes based on LAO/STO heterostructures were fabricated, which can be directly integrated with other materials via van der Waals stacking. The key properties of LAO/STO are preserved when LAO/STO membranes are formed. Conductive atomic force microscope lithography is shown to successfully create reversible patterns of nanoscale conducting regions, which survive to millikelvin temperatures. The ability to form reconfigurable conducting nanostructures on LAO/STO membranes opens opportunities to integrate a variety of nanoelectronics with silicon-based architectures and flexible, magnetic, or superconducting materials.

INTRODUCTION

Complex oxide heterostructures exhibit diverse emergent properties, including a tunable metal-to-insulator transition (1), magnetism (2), superconductivity (3, 4), inhomogeneous transport (5), and spin-orbit coupling (6, 7). In particular, the ability to electronically control the conductivity of the LaAlO₃/SrTiO₃ (LAO/STO) interface with conductive atomic force microscopy (c-AFM) lithography opens opportunities to create various electronic structures such as single-electron transistors (8), electron waveguides (9), and photon detectors (10). In addition to providing new avenues for technological application, these devices allow us to reveal fundamental behavior characteristic of correlated electronic systems (11–13). Furthermore, there are huge potential of LAO/STO heterostructure unleashed when its functionality can be integrated with other materials.

Previously, options for integrating LAO/STO with other materials have been restricted to what is directly placed on top of the LAO surface. By integrating graphene on top of LAO/STO, it has been shown that the charge neutrality point of graphene can be locally and dynamically controlled with nanoscale precision (14). However, the c-AFM technique, which is based on the protonation of LAO surface to attract electrons to the interface (15, 16), limits the material on top of LAO/STO to be so thin that protons can penetrate through. For example, LAO/STO cannot be patterned with c-AFM lithography if bilayer or multilayer graphene is placed on the top (17). Another approach for integrating LAO/STO heterostructures is to grow LAO/STO directly on the top of other materials. However, there are strict limitations on substrate material selection since heteroepitaxy requires very similar lattice constants and crystal structures (18). Besides, it is well known that formation of a two-dimensional electron gas (2DEG) is very sensitive to point defects and the strain state of STO (19, 20). The ability of c-AFM lithography to create nanostructures in LAO/STO depends sensitively on the quality of the underlying STO. Conductive nanostructures, previously created with molecular beam epitaxy–grown LAO/STO on Si substrate, have a relatively large sheet resistance, which is likely related to structural defects in the STO layer that is due to the lattice mismatch between STO and Si (21).

A promising approach for integration of LAO/STO is to create a freestanding ultrathin (submicrometer) layer that can be integrated with other materials similar to the way in which van der Waals stacks are produced with 2D layered materials such as graphene, hexagonal boron nitride, and transition metal dichalchogenides (22). To create these freestanding materials, it is desirable to start with an established thin-film growth technique, followed by a strategy for releasing the top layer from the substrate. Synthesis and transfer of several perovskite oxides and oxide heterostructures have been previously realized with the help of a Sr₃Al₂O₆ sacrificial layer (23–25). Note that although Sr₃Al₂O₆ surface enables preserving the perovskite step and terrace structure of the underlying substrate, the termination control may not be easily achieved (20, 26). The LAO/STO membrane can also be realized by strain engineering (27), but the size of a single piece is limited to several micrometers, and the thickness of STO layer cannot be controlled. Besides, this method requires the LAO layer to be tens of nanometers in thickness, which will lead to metallic state of LAO/STO interfaces, indicating that c-AFM lithography is incompatible.

To realize a transferrable and reconfigurable LAO/STO-based 2DEG, three properties need to be preserved: (i) tunable metal-to-insulator transition, (ii) conductance comparable to that of typical LAO/STO 2DEG, and (iii) persistence of conductivity to cryogenic temperatures. Here, we demonstrate how to create freestanding LAO/STO membranes that meet all three requirements. The transferred freestanding membrane preserves its single-crystalline structure and atomically smooth surface. Nanoscale conducting regions at the heterointerface can be created and erased by c-AFM lithography. The conductive nanowire we sketched on the sample survives at cryogenic temperature and shows possible superconducting behavior. We also discuss some future directions opened up by the newly developed LAO/STO membrane platform.

RESULTS

Fabrication of freestanding LAO/STO membrane

To develop freestanding form of LAO/STO, careful consideration of lattice symmetry, growth thermodynamics, and etchant selectivity for the sacrificial layer and membrane material is required. Our approach to releasing LAO/STO from its oxide substrate here is to insert a sacrificial SrRuO₃ (SRO) layer between pulsed laser deposition (PLD)–grown LAO/STO film and oxide substrates (28). Since the heterointerface property of LAO/STO highly depends on the quality of STO, synthesizing high-quality STO/SRO templates is crucial for this study. It requires not only minimizing point defect formation but also creating an atomically flat surface with TiO₂ termination. A schematic of LAO/STO freestanding membrane fabrication process is shown in Fig. 1A. We first grew a SRO (20-nm) epitaxial layer followed by a 200-nm-thick STO layer on a STO (001) substrate by PLD. The thicknesses of the SRO and STO layers were controlled by monitoring reflection high-energy electron diffraction (RHEED) oscillations (Fig. 1B). Next, we implemented buffered hydrofluoric acid (BHF) etching and annealing to make the STO surface TiO₂-terminated. Figure 1C shows the 2θ x-ray diffraction (XRD) patterns of a STO/SRO template. Since reflections of STO substrate and film are not distinguishable, we conclude that cation stoichiometry in the PLD-grown STO is close to ideal (red curve in fig. S2) (29). The AFM topography shows an atomically flat surface with 3.9-Å unit cell (u.c.) steps (Fig. 1F), which is consistent with the STO substrate u.c. height. Then, a 10-u.c.-thick LAO film was deposited on the top of STO/SRO template. The LAO/STO heterostructure was released from the substrate by selective etching of the sacrificial SRO layer in an aqueous solution of NaIO₄. After the SRO was selectively etched, the released LAO/STO film floated on the solution. An Al₂O₃ substrate was then used to catch the freestanding LAO/STO film. Figure 2A shows an optical image of a millimeter-sized LAO/STO membrane transferred onto Al₂O₃ (0001) substrate. The LAO (002), STO (002), and Al₂O₃ (0006) peaks are all clearly observed in the 2θ – ω x-ray scan, indicating that the LAO/STO membrane preserves its single-crystalline phase after the transfer (Fig. 2B). The AFM scan of LAO/STO film confirms its atomically flat surface (Fig. 2C). Scanning transmission electron microscopy high-angle annular dark field (STEM-HAADF) and atomic-resolution energy dispersive spectroscopy (EDS) investigations were performed on LAO/STO/Al₂O₃ heterostructure to examine the interfacial atomic structure. The STEM-HAADF image shows that the LAO/STO interface is dislocation-free, which means that the epitaxial LAO/STO flake has a relatively high crystal quality (fig. S1). The EDS maps show that the chemically abrupt interface consists of LAO and layer of STO as we designed (Fig. 2E).

Fig. 1. STO/SRO template growth.

(A) Process schematic for oxide growth, membrane release, and transfer. (B) In situ RHEED intensity oscillation during the PLD deposition of SRO and STO films. a.u., arbitrary units. (C) Out-of-plane 2θ − ω XRD patterns of STO/SRO grown on STO (001) substrate around (002) STO peak. (D and E) RHEED patterns at each step of the PLD growth. (F) AFM images measured on the surface of STO/SRO grown on STO (001) substrate.

Fig. 2. Characteristics of freestanding LAO/STO membrane.

(A) Optical microscope image of a LAO (10 u.c.)/STO (200 nm) freestanding membrane transferred onto sapphire substrate. (B) XRD 2θ − ω scan of a LAO (10 u.c.)/STO (200 nm) freestanding membrane transferred onto sapphire substrate. (C) AFM image of a LAO (10 u.c.)/STO (200 nm) freestanding membrane transferred onto sapphire substrate. (D) STEM-HAADF image obtained at the LAO/STO interface. (E) EDS elemental mapping of the LAO/STO interface. The interface is atomically abrupt, and intermixing is not notable.

Electrical tunability of 2DEG with c-AFM lithography

The electrical tunability of the transferred membrane is investigated via c-AFM lithographic patterning. Electrical contact to the LAO/STO interface was fabricated using Ar⁺ milling, followed by sputter deposition of Ti/Au; a second layer of Ti/Au on top was added for wire bonding (see Materials and Methods). Figure 3A shows an optical microscope image of the membrane after electrodes deposition, where a micrometer-sized area is surrounded by interface electrodes to form c-AFM lithography canvas (Fig. 3B). We found that the as-transferred LAO (10 u.c.)/STO (200 nm) heterostructure shows insulating behavior with gigohm (see note S1). Note that our target was an insulating LAO/STO interface that could be programmed using c-AFM lithography. The c-AFM lithography setup is represented in Fig. 3C with pattern of a four-terminal nanowire. As shown in Fig. 3B, the tip first sketches green triangular regions in with V_tip=8 V, followed by sketching of the main channel (yellow path with length L = 1.4 μm) with V_tip=6 V. During c-AFM lithography, we source voltage V₁ = V_pp cos (2πft) (where t is time; peak-to-peak voltage V_pp = 200 mV; frequency f = 9 Hz) from electrode 1 and performed lock-in measurement of current I₁₄ through electrode 4 and the voltage V₈₂ across electrode pairs 8 and 2 (Fig. 3C). Thus, four-terminal conductance can be determined by G_4T = I₁₄/V₈₂. Once the main channel is completed, a sharp conductance jump around 2 μS can be detected, indicating the creation of conducting region at LAO/STO interface (Fig. 3D). The voltage threshold for forming conducting channels is around V_tip=3 V. This process is reversible: When the tip is negatively biased (V_tip=−2 V) and sketched across the existing wire along the red path in Fig. 3B, a steep drop in the conductance is observed (Fig. 3D). The width of the wire can be determined by fitting the conductance drop using the function (30)

$$G(x)=a_1/2*(1+a_2(x-x_0))(1-\text{tanh}((x-x_0)/W)+a_3$$

where a₁₋₃ are fitting parameters, x = vt is the position of the tip moving at velocity v, x₀ represents the center position of the wire, and W is the width of the wire (fig. S4A). The sheet resistance R_s can be calculated by R_s = W/(G_4TL). The wire width and sheet resistance extracted from nanowires created with different positive voltages are shown in fig. S4B. Larger positive bias on the tip yields nanowire with lower sheet resistance, indicating that more electrons are attracted to the interface, while the width of the wire ranges between 15 and 20 nm without a clear monotonic dependence on the writing voltage. These values are close to c-AFM–patterned nanowires at LAO/bulk STO interface (see note S3).

Fig. 3. Creating and cutting conducting wires at the LAO/STO membrane interface.

(A) Optical microscope image of the freestanding LAO (10 u.c.)/STO (200 nm) membrane after depositing electrodes to make the c-AFM lithography canvases. (B) AFM image of a canvas overlaid by a designed c-AFM lithography pattern. The green region is made conducting by c-AFM lithography to serve as an extension of gold electrodes. The yellow line is a nanowire that has length L = 1.4 μm. After writing the nanowire with positive bias, the AFM tip sketches along the red line with negative bias to cut the previous nanowire. (C) Schematic drawing of c-AFM lithography. Gold electrodes are in contact with LAO/STO interface. Green wires indicate the nanoscale conducting regions at the interface created by positively biased AFM tip sketching on the LAO surface. Sketching with a negative bias on the tip will restore the insulating phase at the interface. (D) Four-terminal conductance increases more than three orders of magnitude after the tip finishes sketching the main channel with +6-V tip bias. Then, the conductance is restored to close to 0 nS by sketching across the main channel with −2-V tip bias.

Low-temperature electrical properties of c-AFM–patterned nanowires

To investigate the low-temperature electrical properties of LAO/STO membrane, we performed transport measurements on three different devices at millikelvin temperatures. Here, we describe the result obtained for device C. The results for device A and device B are shown in fig. S7. Before writing the device, the canvas is switched to a fully insulating phase by scanning the entire canvas with a negative voltage, both horizontally and vertically with 10-nm line spacing. To compensate the fast decay of the conducting channels during the transfer to fridge (see note S4), robust 2D virtual leads extending from gold leads to the middle of the canvas are first made with 50-nm line spacing (Fig. 4A). A zoom-in view of these virtual leads is shown in fig. S5A. Then, the 1.2-μm-long nanowire is created, which yields a four-terminal conductance jump of 3 μS at room temperature (fig. S5B). During cryogenic measurements, we source voltage V₁ from electrode 1 while measuring current I₁₄ through electrode 4 and voltage V₈₅ across electrode pairs 8 and 5. Figure S5C shows the temperature dependence of the two-terminal and four-terminal conductance of the nanowire, both of which exhibit metallic behavior from room temperature down to 34 K and localization behavior from 34 to 1 K, which results from carrier freezing at low temperature (31). The two-terminal conductance begins to increase as the temperature is lowered from 300 mK.

Fig. 4. Superconductivity in a nanowire created at the LAO/STO membrane interface (device C).

(A) AFM image of the canvas overlaid by a designed c-AFM lithography pattern. The green region is made conducting by c-AFM lithography to serve as an extension of gold electrodes. The yellow line is the main channel with length L = 1.2 μm. (B) Two-terminal I-V curve (top) acquired at 0 T and 50 mK and the corresponding differential resistance curve dV/dI curve (bottom) show a superconducting feature. The critical current is I_c = 4.9 nA. (C) dV/dI curves at 80 mK with increasing out-of-plane magnetic field through the superconducting transition. (D) dV/dI intensity map as a function of magnetic field and bias current. (E) Temperature-dependent dV/dI curves at 0 T. (F) dV/dI intensity map as a function of temperature and bias current.

At 50-mK base temperature and zero magnetic field, nonlinearity is observed in two-terminal I-V curve at small current value, where the differential resistance dV/dI is lower (Fig. 4B). We attribute this feature to a superconducting region located somewhere between current source and drain. The critical current is calculated from the average of the two resistance peaks I_c = (I⁺ + I⁻)/2 = 4.9 nA. The dip in dV/dI curve disappears at elevated temperature or magnetic fields. Figure 4C shows the differential resistance calculated from I-V curves acquired at T = 80 mK and under different magnetic fields over the range ∣B∣≤0.2 T. Each curve is shifted by ΔR=0.8 kilohms for clarity. As the magnetic field passes beyond the upper critical field, I_c gradually decreases, while the differential resistance near zero bias increases. Figure 4D shows an intensity plot of the differential resistance as a function of magnetic field and bias current. The signal is symmetric with respect to magnetic field, and the upper critical field for this device is B_c2=0.1 T. Similarly, Fig. 4E shows the differential resistance calculated from I-V curves measured at zero magnetic field while varying temperature from T=50 to 300 mK with ΔT= 5-mK step. The suppression of the superconducting feature is also observed with a critical temperature near T=200 mK, which can be inferred from the intensity plot of temperature and bias current (Fig. 4F). The critical temperature and critical field observed for this device at LAO/STO membrane interface are consistent with superconductivity observed in LAO/STO nanowires (32, 33).

However, as shown in fig. S6A, the corresponding four-terminal I-V measurements are not showing a reduced differential resistance near zero bias. One possible explanation is that the superconducting region is located outside the main channel, in the virtual leads rasterized by the AFM tip rather than in the main channel, while the electron density in the main channel falls outside the bounds for superconductivity. In another device (A), however, the superconductivity results in zero bias dip in both two-terminal and four-terminal dV/dI curve (fig. S7B). For device C, at magnetic field larger than 1 T, both the two-terminal resistance and four-terminal resistance decrease with increasing field (fig. S6B). This negative magnetic resistance is possibly caused by the detrapping of frozen-out carriers by magnetic field (31).

DISCUSSION

This transport results demonstrate that the use of chemical release method to realize the freestanding form of LAO/STO heterostructure preserves the integrity of the LAO/STO. Highly reconfigurable nanostructure on LAO/STO membrane with dimensions comparable to current semiconductor technology components can be created by c-AFM lithography.

Looking forward, the fact that conductive nanowires survive at dilution fridge temperatures holds great promise for this freestanding 2DEG platform to realize emergent properties and functionalities upon integration with variety of other materials (Fig. 5A). Removing the STO substrate can enable sizeable strains to be applied, which may not only substantial alter the electronic and superconducting properties but also provide interesting electromechanical interactions. LAO/STO-based flexible nanoelectronics can also be developed (Fig. 5B). LAO/STO nanostructures can also serve as metallic gates that can create quantum confinement, modulate exchange interactions, and otherwise mediate electrostatic interactions in other 2D layers and near-surface materials, including silicon. For example, upon integrating with Si/SiGe, LAO/STO 2DEG can serve as the top gates to confine quantum dots, and because of the versatile control of c-AFM lithography, the location of the quantum dots can be easily redefined (Fig. 5C). Putting LAO/STO 2DEG on other functional oxides or low-dimensional materials may result in a new generation of reconfigurable photonic detectors and tunneling junctions (Fig. 5D). On the other hand, it would be interesting to investigate how the strongly correlated LAO/STO 2DEG would behave in the proximity of magnets, other superconductors, and topological insulators. For instance, if we put LAO/STO membrane on top of ferromagnets such as NiFe, then we can pump spin current into LAO/STO interface and study the spin-orbit coupling in c-AFM–defined nanodevices, instead of growing NiFe on top of LAO (34). Furthermore, LAO/STO membrane gets rid of bulk STO substrate that has large dielectric loss tangent, making it a possible platform for microwave resonators and waveguides (Fig. 5E) (35).

Fig. 5. Possible integration motifs for LAO/STO membranes.

(A) LAO/STO reconfigurable 2DEG platform. (B) LAO/STO integrated with flexible materials to achieve flexible electronics. (C) LAO/STO 2DEG can be used to confine silicon quantum dots. (D) LAO/STO 2DEG can serve as gate for 1D or 2D materials. (E) AFM-patterned LAO/STO resonators coupled to a microwave waveguide.

MATERIALS AND METHODS

Epitaxial film fabrication

SRO, STO, and LAO thin films were epitaxially grown on TiO₂-terminated STO substrates using PLD with in situ RHEED monitoring. To achieve the TiO₂-terminated substrates, as-received STO substrates were etched by buffered hydrofluoric acid (HF) for 1 min and annealed at 1000°C for 6 hours. During the SRO and STO film growth, the temperature of the PLD chamber was kept as 615° and 750°C, respectively. The oxygen partial pressure was 0.12 and 0.1 mbar, respectively. After growing STO/SRO, the samples were cooled down to room temperature under an oxygen ambient of 1 atm. To obtain the TiO₂-terminated STO/SRO template, STO/SRO film grown on STO substrate was etched by buffered HF for 10 s and annealed at 900°C for 2 hours. The atomically flat surface on the thermally treated substrate is shown by atomic for microscopy images in Fig. 1F. LAO film was then grown in an ambient oxygen pressure of 1 × 10⁻³ mbar with substrate temperature of 550°C and was cooled down to room temperature under an oxygen ambient of 1 atm.

Release of freestanding membranes

The oxide heterostructure was immersed into a 0.4-mol NaIO₄ solution to dissolve the SRO layers at room temperature. After 48 hours, LAO/STO film was released and collected from solution. Then, the film was washed by deionized water and picked up by Al₂O₃ substrate.

Patterning of electrodes

LAO/STO membrane samples were patterned with a maskless laser aligner (Heidelberg, MLA100) using AZ4110 photoresist. After exposure and developing, the sample underwent ion milling 29 nm and backfilling with 4-nm titanium and 25-nm gold in a Plassys 8 pocket e-Gun evaporator with built-in ion gun. Excessive metals were lifted off in acetone. Then, the bonding pads were deposited with 5-nm titanium and 27-nm gold at a small angle, which were able to cover the edge of LAO/STO membrane.

c-AFM lithography

The c-AFM lithography was carried out in an Asylum Research MFP-3D AFM under conditions of controlled relative humidity (40%) and temperature (293 K). The interface of LAO/STO membrane was grounded during writing, and the DC writing voltage was applied to c-AFM tip through a 100-kilohm resistor.

Low-temperature transport measurement

Low-temperature transport measurements were performed in a Quantum Design Physical Property Measurement System (PPMS) dilution refrigerator. Source voltages were applied by a 24-bit digital/analog converter National Instruments PXI-4461, which can also simultaneously perform 24-bit analog/digital conversion. The drain current was measured after amplification by a subfemtoampere current amplifier (Femto DDPCA300). The four-terminal voltage drop was measured by a differential voltage amplifier (Femto DLPVA), which has 1-terohm input impedance.

STEM characterization

The atomic structure imaging was conducted on LAO/STO/Al₂O₃ sample by using Cs-corrected TEM (JEOL-ARM300F) operated at 300 kV. Convergence angle for both STEM and EDS acquisition was 35.63 mrad. Collection angle for HAADF imaging was 68 to 280 mrad. Energy-dispersive x-ray spectrometer with a detectable area of 100 mm² was used in STEM imaging mode. EDS maps with a total number of 3020 frames were acquired with a speed of 0.655 s per frame with 256 by 256 pixels. The specimen drift was corrected during acquisition. Each elemental map is constructed by integrating the signal from La-L_α, Sr-L_α, Al-K_α, and Ti-K_α characteristic x-rays, respectively. The EDS maps in Fig. 2 were processed by the Wiener filter to minimize random noise, and the averaged EDS profiles in fig. S1 were obtained from the maps without filtering, which do not contain artifact from filtering.

SUPPLEMENTARY MATERIALS

Supplementary material for this article is available at http://advances.sciencemag.org/cgi/content/full/7/33/eabh1284/DC1