Table 8.
Summary of reported transistors with GeSn layers grown by CVD technology in terms of institution, transistor type, Sn content, subthreshold swing (SS), Ion/Ioff ratio, and VDS.
| Year | Institution | Transistor Type | Sn Composition (%) | SS (mV/dec) | Ion/Ioff | VDS (V) | Refs |
|---|---|---|---|---|---|---|---|
| 2017 | University of Notre Dame | Ge/GeSn p-type TFETs | 11 and 12.5 | 215 | 9.2 × 103 | −0.5 | [99] |
| 2017 | NUS | GeSn FinFET on GeSnOI | 8 | 79 | >104 | −0.5 | [93] |
| 2017 | National Taiwan University | Vertically Stacked GeSn Nanowire pGAAFETs | 6 and 10 | 84 | - | −1 | [214] |
| 2017 | National Taiwan University | GeSn N-FinFETs | 8 | 138 | 103 | - | [94] |
| 2018 | National Taiwan University | GeSn N-Channel MOSFETs | 4.5 | 180 | - | - | [215] |
| 2018 | National Taiwan University | Vertically Stacked 3-GeSn- Nanosheet pGAAFETs | 7 | 108 | 5 × 103 | −0.5 | [91] |
| 2020 | PGI 9 | Vertical heterojunction GeSn/Ge gate-all-around nanowire pMOSFETs | 8 | 130 | 3 × 106 | −0.5 | [216] |