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. 2021 Feb 5;32(3):932–946. doi: 10.1109/TNNLS.2021.3054746

TABLE I. Architecture Details of Proposed Anam-Net, Where Inline graphic Is the Minibatch Size and the Flow of the Architecture Is From Left to Right in Each Row (Top to Bottom for Successive step). The Schematic Was Provided in Fig. 2. The Architecture Details of Anamorphic Depth (AD) Block Are Given in Table II.

Block Input Convolution MaxPool AD Block Convolution MaxPool
Size (N, 1, 512, 512) (N, 64, 512, 512) (N, 64, 256, 256) (N, 64, 256, 256) (N, 128, 256, 256) (N, 128, 128, 128)
Block AD Block Convolution MaxPool AD Block Convolution MaxPool
Size (N, 128, 128, 128) (N, 256, 128, 128) (N, 256, 64, 64) (N, 256, 64, 64) (N, 256, 64, 64) (N, 256, 32, 32)
Block Trans Conv AD Block Concat Convolution Trans Conv AD Block
Size (N, 256, 64, 64) (N, 256, 64, 64) (N, 512, 64, 64) (N, 256, 64, 64) (N, 256, 128, 128) (N, 256, 128, 128)
Block Concat Convolution Trans Conv AD Block Concat Convolution
size (N, 512, 128, 128) (N, 256, 128, 128) (N, 128, 256, 256) (N, 128, 256, 256) (N, 256, 256, 256) (N, 128, 256, 256)
Block Trans Conv Concat Convolution Output
Size (N, 64, 512, 512) (N, 128, 512, 512) (N, 64, 512, 512) (N, 3, 512, 512)