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. Author manuscript; available in PMC: 2021 Oct 28.
Published in final edited form as: Concurr Comput. 2019 Oct 23;32(5):e5528. doi: 10.1002/cpe.5528

FIGURE 10.

FIGURE 10

A simple representation of data positions to be accessed by a 8 × 4 thread block. A, Geometric data distribution in the mesh; B, Geometric data distribution in the proposed structure; C, Data distribution in global memory