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. Author manuscript; available in PMC: 2021 Oct 28.
Published in final edited form as: Concurr Comput. 2019 Oct 23;32(5):e5528. doi: 10.1002/cpe.5528

FIGURE 3.

FIGURE 3

Representation of memory access pattern for sequential threads when computing Equation (5). From left to right, we show data required by each thread from points (x, y, z − 1), (x, y − 1, z), (x, y, z), (x, y + 1, z), and (x, y, z + 1)