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. Author manuscript; available in PMC: 2021 Oct 28.
Published in final edited form as: Concurr Comput. 2019 Oct 23;32(5):e5528. doi: 10.1002/cpe.5528

FIGURE 4.

FIGURE 4

Representation of memory access pattern for sequential threads when accessing data from (x − 1, y, z) (a) and (x + 1, y, z) (b) to solve Equation (5). A, (x − 1, y, z) points; B, (x + 1, y, z) points