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. 2021 Nov 29;24(12):103526. doi: 10.1016/j.isci.2021.103526

Figure 8.

Figure 8

The connectors' design

(A) Connector type 1. This module will be used to interface the first and the second parity checker. The depicted design implements an AND gate using a 2-input NOR gate.

(B) The connector type 2 module design. The Boolean expression for this module in the multi-bit counter design is represented by a cascade of two AND gates. The first AND gate integrates the signals from the outputs of the preceding two parity checkers. The output of the first AND gate will be one of the inputs of the second AND gate. The other input for the second AND gate is the external signal. The connector 2 output will use a diffusible small molecule for inter-cellular communication.