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. Author manuscript; available in PMC: 2022 Dec 9.
Published in final edited form as: IEEE Trans Biomed Circuits Syst. 2021 Dec 9;15(5):877–897. doi: 10.1109/TBCAS.2021.3112756

Fig. 12:

Fig. 12:

Hardware implementation of the proposed DVTE classifier: (a) system architecture, (b) layout, (c) area breakdown of the DVTE processor and a single decision tree, and (d) system power breakdown.