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. 2022 Mar 22;12(7):1043. doi: 10.3390/nano12071043

Figure 22.

Figure 22

(a) Schematic and (b) SEM image of SiNN transistor studied. The schematic (a) refers to long channel transistors for which the length of the NWs (LNFs) is less than the channel length (Lc). Conversely, the SEM image (b) refers to the possible conduction paths involving NW–NW junctions are indicated in red. Reproduced from [27].