Table 2.
Technical specification of proposed architecture.
No. of channels | 04 | |
---|---|---|
Layers/Channel | Output size/channel | Block description/Channel |
Convolution | 112 by 112 | Kernel 7 × 7 stride 2 |
Pooling | 56 by 56 | 3 × 3 Max.Pooling, stride 2 × 2 |
Dense block 1 | 56 by 56 | [1 × 1 Conv] × 6 [3 × 3 Conv] × 6 |
Transition 1 | 56 × 56 | Batch normalization layer and a 1 × 1 convolution layer followed by 2 × 2 average pooling layer |
28 × 28 | ||
Dense block 2 | 28 × 28 | 1 × 1 Conv] × 12 [3 × 3 Conv] × 12 |
Transition 2 | 28 × 28 | Batch normalization layer and a 1 × 1 convolution layer followed by 2 × 2 average pooling layer |
14 × 14 | ||
Dense block 3 | 14 × 14 | 1 × 1 Conv] × 24 [3 × 3 Conv] × 24 |
Transition layer 3 | 14 × 14 | Batch normalization layer and a 1 × 1 convolution layer followed by 2 × 2 average pooling layer |
7 × 7 | ||
Dense block 4 | 7 × 7 | 1 × 1 Conv] × 16 [3 × 3 Conv] × 16 |
Classification layer | 1 × 1 | 7 × 7 global average pool |
1000D fully connected, SoftMax |