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. 2022 Jul 6;414(22):6531–6540. doi: 10.1007/s00216-022-04210-4

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© The Author(s) 2022

Open AccessThis article is licensed under a Creative Commons Attribution 4.0 International License, which permits use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons licence, and indicate if changes were made. The images or other third party material in this article are included in the article's Creative Commons licence, unless indicated otherwise in a credit line to the material. If material is not included in the article's Creative Commons licence and your intended use is not permitted by statutory regulation or exceeds the permitted use, you will need to obtain permission directly from the copyright holder. To view a copy of this licence, visit http://creativecommons.org/licenses/by/4.0/.

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Fig. 1 — Rendered chip images using SolidWorks (Dassault Systems SolidWorks Corp., France), showing a different layers before lamination of 4-plex chip design and b the final chip with the description of its main components. c Picture of 4-plex vertical chip showing assay being proceeded in incubation area and the electrochemical reaction happening at the working electrode. The incubation holes of the chips are the ones covered with blue colored liquid, and the washing holes and inlet and outlet are covered by transparent PBS droplets