Table 1.

Sizing of PMOS and NMOS transistors.

${\mathit{DCVC}}_{\mathit{LP}}$			${\mathit{DCVC}}_{\mathit{LD}}$
Label	Type	Width (μm) ${}^{\ast 1}$	Label	Type	Width (μm) ∗2
$MP1$	P	0.7 × 10	$MP1$	P	0.7 × 10
$MP2$	P	0.45 × 10	$MP2$	P	0.45 × 10
$MP3$	P	5.3 × 10	$MP3$	P	5.3 × 10
$MN1$	N	5.0 × 10	$MN1$	N	5.0 × 10
$MN2$	N	1.0 × 10	$MN2$	N	1.0 × 10
$MN3$	N	1.5 × 10	$MN3$	N	1.5 × 10
$MN4$	N	2.0 × 10	$MN4$	N	2.0 × 10
$MN5$	N	0.025 × 10	$MN5$	N	0.025 × 10
$MP4$	P	1.5 × 2	$MP4$	P	7.5 × 2
$MP5$	P	1.0 × 10	$MP5$	P	1.2 × 10
$MP6$	N	2.0 × 0.25	$MP6$	P	4.0 × 0.25
$MP7$	N	0.2 × 4	$MP7$	P	0.5 × 4
$MP8$	N	0.1 × 1	$MP8$	P	0.25 × 1
$MP9$	N	2.5 × 10	$MP9$	P	5.0 × 10
$MN6$	N	0.13 × 5	$MN6$	N	0.26 × 5
$MN7$	N	0.5 × 10	$MN7$	N	1.0 × 10
$MN8$	N	3.0 × 10	$MN8$	N	7.0 × 10
$MN9$	N	0.25 × 1	$MN9$	N	0.25 × 1
$MN10$	N	3.5 × 7	$MN10$	N	5.0 × 7
$MN11$	N	0.35 × 1	$MN11$	N	0.35 × 1

*¹: Active area = 16.90 μm². *²: Active area = 23.19 μm². Vthn = 0.28 V, and Vthp = −0.2 V.