Table 1.
Module state | Transistor switch state | Module output | |||
---|---|---|---|---|---|
Q i1 | Q i2 | Q i3 | Q i4 | V i | |
0 | Off | Off | Off | Off | {−VCi, 0, VCi} |
1 | On | Off | On | Off | V Ci, |
2 | Off | On | Off | On | −VCi |
3 | On | Off | Off | On | 0 (bypass) |
4 | Off | On | On | Off | 0 (bypass) |
5 | Off | On | Off | Off | {−VCi, 0} |
6 | Off | Off | On | Off | {0, VCi} |
7 | On | Off | Off | Off | {0, VCi} |
8 | Off | Off | Off | On | {−VCi, 0} |