Table 1.
Architectures of the proposed generator and discriminator.
| Layers | Output shape | Norm./Act. |
|---|---|---|
| Generator | ||
| Input | 2 ×128 ×128 | – |
| Padding | 2 ×128 ×128 | ELR/LReLU/PN |
| Conv2d | 32 ×64 ×64 | ELR/LReLU/PN |
| Conv2d | 64 ×32 ×32 | ELR/LReLU/PN |
| ResBlock*2 | 64 ×32 ×32 | ELR/LReLU/PN |
| Upsample | 64 ×64 ×64 | – |
| Conv2d | 32 ×64 ×64 | ELR/LReLU/PN |
| Upsample | 32 ×128 ×128 | – |
| Conv2d | 16 ×128 ×128 | ELR/LReLU/PN |
| Padding | 16 ×134 ×134 | – |
| Conv2d | 2 ×128 ×128 | Tanh |
| Discriminator | ||
| Input | 4 ×128 ×128 | – |
| Conv2d | 16 ×64 ×64 | ELR/LReLU |
| Conv2d | 32 ×32 ×32 | ELR/LReLU |
| Conv2d | 64 ×16 ×16 | ELR/LReLU |
| Conv2d | 128 ×15 ×15 | ELR/LReLU |
| Conv2d | 1 ×14 ×14 | – |