TABLE IV.

Comparison with Prior-Art HV Pulsers

	This Work	[27]	[40]
Technology	0.18-μm HV BCD	0.18-μm HV CMOSa	0.18-μm HV BCD
Pulse shape	3-level unipolar	3-level unipolar	3-level bipolar
Level shifting	Pulse-triggered latch	Cross-coupled latch	Resistor w/Zener diode
# of HV FET	8	10	10
Operating freq. (MHz)	5	3.3	9
Output VPP	60	30	60
Load/ch	1D CMUT 10 pF	1D CMUT 40 pF	1D CMUT 18 pF
Area/ch (mm2)	0.2	0.33	0.167
Power Consumptionb (mW/ch)	263.4	52.4	571.7c

^aSupports HV MOS devices with 30-V tolerant gate-oxide.

^bPower consumption is reported for continuous operation. Average power consumption for any use case can be calculated by multiplying this figure with the duty cycle.

^cAverage power (980 μW) with 7-MHz 3-cycle burst at a PRF of 4 kHz is converted to instantaneous power for comparison by $980\mu \text{W}\times \frac{7\text{MHz}}{4\text{kHz}\times 3}$.