Table 6.
Comparison of the conventional digital CMOS-based computing with the MCA-based in-memory computation.
| Compression for (128 × 128) image [19] | |||
|---|---|---|---|
| Parameters | CMOS | Memristor | Prominent Improvement |
| Number of Operations | 1282 × 4 × 5 | 1282 × 2 | 10 times |
| Area (μm2) | 327000 | 7864.2 | 5 orders of magnitude |
| Processing Speed (μs) | 19.2 | 15 | 1.28 times |
| Energy Consumption (nJ) | 70.9080 | 6.4398 | 11 times |
| Full adder circuit by using 3-bit [20] | |||
| Parameters |
CMOS |
Memristor |
Prominent Improvement |
| Number of Transistor | 34 | 24 | 10 lesser transistors |
| Processing Time (ps) | 75.3 | 62.4 | 14.84% |
| Power Consumption (μW) | 117.3 | 53.08 | 54.74% |
| Our work on compression for (512 × 512) image | |||
| Parameters |
CMOS |
MCA |
Prominent Improvement |
| Number of Operations [19,20] | 5123 + (5122 × 511) | 5122 | 1023 times |
| Area (μm2) [19] | 1585446.912 | 41943.04 | 37.8 times |
| Energy Consumption (pJ) [19] | 1115.4 | 1.484 | 752 times |
| Processing Time (μs) [19,20] | 0.15 | 0.06 | 2.5 times |
| Power Consumption (mW) [19] | 7436 | 24.733 | 300 times |