This PDF file includes:

• Text S1. Analysis of circuit stability
• Text S2. Analysis of twin matrices mismatch
• Text S3. Polynomial regression
• Text S4. Introduction to Boston housing dataset
• Text S5. Analysis of least squares
• Text S6. Computing performance benchmarking
• Fig. S1. Current-voltage characteristics of the Ti/HfO₂/C RRAM device.
• Fig. S2. Cross-point resistive memory circuit on a printed circuit board.
• Fig. S3. Device programming.
• Fig. S4. Convergence analysis of the linear regression experiment.
• Fig. S5. Extended circuit for one-step prediction.
• Fig. S6. More linear regression results.
• Fig. S7. Linear regression with two independent variables.
• Fig. S8. Polynomial regression result.
• Fig. S9. Logistic regression results.
• Fig. S10. Convergence analysis of the logistic regression experiment.
• Fig. S11. Solution of linear/logistic regression with negative independent variable values.
• Fig. S12. Rescaling the attribute matrix X and price vector y.
• Fig. S13. One-step prediction circuit schematic for Boston housing dataset.
• Fig. S14. Random first-layer weight matrix W⁽¹⁾.
• Fig. S15. The hidden-layer output matrix X.
• Fig. S16. Training and inference of the two-layer neural network.
• Fig. S17. Linear regression of Boston housing dataset with a RRAM model.
• Fig. S18. Impact of wire resistance.
• Fig. S19. Linear regression of Boston housing dataset and its representative subsets.
• Fig. S20. Scaling behavior of computing time of linear regression.
• Fig. S21. Analysis of device variation impact and computing time.

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