In the article titled “Highly Integrated Multiplexing and Buffering Electronics for Large Aperture Ultrasonic Arrays” [1], there was an error in figure 7. The figure should show as per the submitted files. The corrected figure is shown below and is listed as Figure 1:
Figure 1.
Switch architecture for the first- and second-generation switches. All switches used in each respective unit cell (e.g., select and transmit/receive) utilize these basic architectures. The second-generation switches have source resistors R1 and R2 which reduce the current in the mirrors and thereby slow down charging of the switch device gate capacitances (M1/M2) to limit charge-injection. (b) Adapted from [31].
References
- 1.Wodnicki R., Kang H., Li D., Stephens D. N., Jung H., Sun Y., Chen R., Jiang L., Cabrera-Munoz N. E., Foiret J., Zhou Q., and Ferrara K. W., “Highly integrated multiplexing and buffering electronics for large aperture ultrasonic arrays,” BME Frontiers, vol. 2022, article 9870386, 1–22, 2022 [DOI] [PMC free article] [PubMed] [Google Scholar]