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. 2024 Feb 12;19(1):26. doi: 10.1186/s11671-024-03968-z

Correction: Switching performance assessment of gate-all-around InAs–Si vertical TFET with triple metal gate, a simulation study

Dariush Madadi 1,, Saeed Mohammadi 2
PMCID: PMC10861417  PMID: 38345703

Correction: Discover Nano (2023) 18:37 10.1186/s11671-023-03816-6

Following the publication of the original article [1], we were informed that:

a. citations [34] and [35] on p. 11 of the article PDF should be changed to [33] and [34]

b. respective references should be added to the reference list:

[33] 10.1109/ACCESS.2022.3228165

[34] 10.1007/s12633-023-02315-8

The original article has been corrected.

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Reference

  • 1.Madadi D, Mohammadi S. Switching performance assessment of gate-all-around InAs–Si vertical TFET with triple metal gate, a simulation study. Discover Nano. 2023;18:37. doi: 10.1186/s11671-023-03816-6. [DOI] [PMC free article] [PubMed] [Google Scholar]

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