Design method for VDCC-based analog comb filter for power line interference cancellation

Abstract

An analog comb filter is implemented by linking multiple VDCC-based notch filters in a cascading fashion (N in total), eliminating N different pole frequencies. This study focuses on suppressing a fundamental frequency of power-line interference of 50 Hz and its consecutive three odd harmonics at 150 Hz, 250 Hz, and 350 Hz. One significant advantage of this comb filter is the independent control over filters' parameters like quality factor and pole frequency. Additionally, these filters can be electronically tuned by adjusting the transconductance gain of VDCC. The suggested notch filter configuration involves 2 capacitors, 2 resistors, and 1 VDCC element. Extensive simulations were conducted using PSPICE simulator software to validate the effectiveness of these filters. The basic building block, VDCC, is designed and implemented in the simulation using integrated circuits MAX435 and AD844.

• •Design uses a VDCC-based high Q notch filter as the active building block.
• •The filter employs fewer active and passive components.
• •Simulated results using commercially available ICs, MAX435 and AD844, confirm the filter's practical utility.

Graphical abstract

Specifications table

Subject area:	Engineering
More specific subject area:	Electronics circuit design
Name of your method:	Methodology to design VDCC-based comb filter
Name and reference of original method:	C.D. Tsai, D. C. Chiou, Y. D. Lin, H.L. Chan, and C.P. Wu, “An active comb filter design for harmonic interference removal,” Journal of the Chinese Institute of Engineers, vol. 21, no. 5, pp. 605–610, 1998.
Resource availability:	Method validation using ICs MAX435 and AD844 in PSPICE software.

Method details

To effectively eliminate power-line interference from biological signals such as electrocardiogram (ECG), electroencephalogram (EEG), and electromyogram (EMG), suppressing the primary frequency and a few odd harmonics associated with it is essential [1,2]. A valuable solution for achieving this is the utilization of a comb filter. Unlike notch filters, comb filters can attenuate multiple frequencies simultaneously. Analog filters hold a distinct advantage for real-time signal processing compared to digital counterparts. Consequently, numerous analog comb filters have been listed in existing literature [3], [4], [5], [6], [7], [8], [9] to eliminate the primary frequency of PLI and its associated odd harmonics from biological signals like electrocardiogram (ECG), electroencephalogram (EEG), and electromyogram (EMG).

The key benefits of the suggested comb filter, which represents the novelty of the circuit by overcoming the literature research gaps, can be summarized as follows:

• •Minimal Active Building Blocks: The proposed comb filter is notably efficient regarding active components, requiring only 4 VDCCs. Meanwhile, in [3], [4], [5], [6], [7], [8], more than four active building blocks are used.
• •Reduced Passive Components: Besides its frugality with active components, the proposed filter employs fewer passive components than [3], [4], [5], [6], [7], [8].
• •Low MOSFET Count: Compared to alternative approaches in [3], [4], [5], [6], [7], [8], the proposed filter demands a mere 48 MOSFETs, contributing to its efficiency and simplicity.
• •Orthogonal Parameter Relationship: The filter establishes an orthogonal correlation between the pole frequency and the quality factor, enhancing flexibility and adaptability for various applications.

The proposed comb filter has only one limitation: the notch depth is lesser than the existing comb filters. Still, it is sufficient to attenuate the power-line interference effectively. Also, a high notch depth may distort the output signal.

Due to the inherent properties of current mode circuits, including lower power consumption, wider bandwidth, higher dynamic range, and simpler architecture, several current mode blocks have gained prominence in designing various analog signal processing and generating circuits. These include second-generation current conveyor (CCII) [10], voltage differencing transconductance amplifier (VDTA) [11], differential difference current conveyor (DDCC) [12], voltage differencing gain amplifier (VDGA) [13], multiple output current differencing transconductance amplifier (MOCDTA) [14], and voltage differencing current conveyor (VDCC) [15,16]. The VDCC is particularly noteworthy for its ability to offer electronically adjustable transconductance gain and facilitate the concurrent current and voltage transfer across its terminals. This inherent versatility renders the VDCC highly conducive to the development of active filters and inductor simulators, among other applications. The VDCC, depicted in Fig. 1, is an analog building block featuring five terminals, P, N, X, Z, and W. P and N are high-impedance input terminals, Z and W are high-impedance output terminals, and X is low-impedance output terminal. The VDCC comprises an operational transconductance amplifier (OTA) with a transconductance gain represented as “g_m,” followed by a second-generation current conveyor (CCII) in cascade mode. The relationships among the various terminals of the VDCC are described in [16] as given in Eq. (1).

$$\left[\begin{array}{c}\begin{array}{c}{I}_P\\ \\ I_N\\ \\ I_Z\end{array}\\ \\ V_X\\ \\ I_W\end{array}\right]=\left[\begin{array}{c}\begin{array}{c}0\\ \\ 0\\ \\ g_m\end{array}\\ \\ 0\\ \\ 0\end{array}\begin{array}{c}\begin{array}{c}0\\ \\ 0\\ \\ -g_m\end{array}\\ \\ 0\\ \\ 0\end{array}\begin{array}{c}\begin{array}{c}0\\ \\ 0\\ \\ 0\end{array}\\ \\ 1\\ \\ 0\end{array}\begin{array}{c}\begin{array}{c}0\\ \\ 0\\ \\ 0\end{array}\\ \\ 0\\ \\ 1\end{array}\right]\left[\begin{array}{c}{V}_P\\ \\ V_N\\ \\ V_Z\\ \\ I_X\end{array}\right]$$ (1)

Fig. 1.

Electrical symbol of VDCC.

The port relationship in matrix form in Eq. (1) can be understood as follows. The VDCC operates as follows: The differential input voltage (V_P - V_N) undergoes multiplication by the transconductance gain (g_m) of the VDCC, resulting in a current output, denoted as I_Z, which is accessible at output terminal Z. Simultaneously, the voltage V_Z is present at terminal X, and it is equivalent to V_Z. The current at terminal X is then conveyed to terminal W, meaning I_W = I_X. Notably, no current flows through the P and N terminals, leaving I_P and I_N equal to zero because of the high input impedance of the VDCC. An IC-based implementation of VDCC using an OTA IC MAX435 and a CFOA IC AD844, shown in Fig. 2, is used in this research article. The exact VDCC implementation will be employed for simulation and has been explored for hardware implementation.

Fig. 2.

Implementation of VDCC using ICs MAX435 and AD844.

A single VDCC-based notch filter has been implemented, as presented in Fig. 3. In this implementation, 2 capacitors and 2 resistors are employed as the passive components. A VDCC is used as an active block in this filter.

Fig. 3.

Circuit diagram of a single VDCC-based notch filter.

The transfer function is obtained by standard analysis of Fig. 3 as follows.

$$H\left(s\right)=\frac{V_{out}\left(s\right)}{V_{in}\left(s\right)}=\frac{s^2+\frac{g_m}{R_2{C}_1{C}_2}}{s^2+\frac{s}{R_1{C}_1}+\frac{g_m}{R_2{C}_1{C}_2}}$$ (2)

The second-order notch filter transfer function can be expressed as:

$$H\left(s\right)=\frac{s^2+{\omega }_0^2}{s^2+s\left(\frac{{\omega }_0}{Q}\right)+{\omega }_0^2}$$ (3)

By comparing the coefficients in Eqs. (2) and (3), we can derive the values of the pole frequency (ω_o) in rad/sec and the quality factor (Q) for the notch filter as follows:

$$f_0=\frac{1}{2\pi }\sqrt{\frac{g_m}{R_2{C}_1{C}_2}}$$ (4)

$$Q=R_1\sqrt{\frac{g_m{C}_1}{R_2{C}_2}}$$ (5)

Observing Eqs. (4) and (5), it becomes evident that the pole-frequency and the quality factor can be individually tuned to achieve specific values, allowing for independent control of these crucial parameters. In this design, we have intentionally set the value of R₂ as R₂= 1/g_m for ease in setting the components’ values for various pole frequencies and quality factors. Considering R₂= 1/g_m, (2), (4), and (5) can be rewritten as:

$$H\left(s\right)=\frac{V_{out}\left(s\right)}{V_{in}\left(s\right)}=\frac{s^2+\frac{g{m}^2}{C_1{C}_2}}{s^2+\frac{s}{R_1{C}_1}+\frac{g{m}^2}{C_1{C}_2}}$$ (6)

$$f_0=\frac{g_m}{2\pi }\sqrt{\frac{1}{C_1{C}_2}}$$ (7)

$$Q=g_m{R}_1\sqrt{\frac{C_1}{C_2}}$$ (8)

The manipulation of g_m, C₁, and C₂ provides the means to fine-tune the pole frequency to the desired value. In contrast, by employing R₁, the quality factor can be independently adjusted while keeping gm, C₁, and C₂ constant, as depicted in Eqs. (7) and (8). The same notch filter is used in the proposed comb filter, discussed in the next section.

A novel analog comb filter using VDCC is discussed here. The filter, which can sharply attenuate more than one frequency, is called a comb filter. Its name is given due to the comb-like magnitude response in the frequency domain. One of the methods to synthesize a comb filter is by connecting N number of notch filters for suppressing N number of pole frequencies. We have chosen four notch filters in the proposed design for suppressing four pole frequencies, one PLI, and its three odd harmonics. The cascading of four notch filters for four different pole frequencies with four different quality factors is presented in Fig. 4. The notch filters are precisely tuned to target specific frequencies, including the fundamental frequency of power line interference at 50 Hz, as well as the 3^rd, 5^th, and 7^th odd harmonics at 150 Hz, 250 Hz, and 350 Hz. 10, 20, 30, and 40 quality factors have been thoughtfully selected to achieve a sharp and effective notching performance.

Fig. 4.

Methodology to design analog comb filter.

The VDCC comb filter circuit, which is built upon the VDCC-based approach and incorporates four notch filters, is visually presented in Fig. 5. This design utilizes 4 Voltage Differencing Current Conveyors (VDCCs), 8 capacitors, and 4 resistors to achieve its functionality. The transconductance gain of all four VDCCs is taken the same as g_m because the same VDCC has been used for all the four notch filters. In the proposed comb filter, eight capacitors, C₁, C₂, C₃, C₄, C₅, C₆, C₇, and C₈, and four resistors, R₁, R₂, R₃, and R₄ are used. By multiplying the transfer functions of four successively linked notch filters, it is possible to get the transfer function of the suggested comb filter shown in Fig. 5.

$$H\left(s\right)=\frac{s^2+\frac{g_{m1}}{R_2{C}_1{C}_2}}{s^2+\frac{s}{R_1{C}_1}+\frac{g_{m1}}{R_2{C}_1{C}_2}}\times \frac{s^2+\frac{g_{m2}}{R_4{C}_3{C}_4}}{s^2+\frac{s}{R_3{C}_3}+\frac{g_{m2}}{R_4{C}_3{C}_4}}\times \frac{s^2+\frac{g_{m3}}{R_6{C}_5{C}_6}}{s^2+\frac{s}{R_5{C}_5}+\frac{g_{m3}}{R_6{C}_5{C}_6}}\times \frac{s^2+\frac{g_{m4}}{R_8{C}_7{C}_8}}{s^2+\frac{s}{R_7{C}_7}+\frac{g_{m4}}{R_8{C}_7{C}_8}}$$ (9)

Fig. 5.

Comb filter using VDCC-based notch filters for n= 4.

For R₂= R₄= R₆= R₈= 1/g_m, (9) gives:

$$H\left(s\right)=\frac{s^2+\frac{g{m}^2}{C_1{C}_2}}{s^2+\frac{s}{R_1{C}_1}+\frac{g{m}^2}{C_1{C}_2}}\times \frac{s^2+\frac{g{m}^2}{C_3{C}_4}}{s^2+\frac{s}{R_3{C}_3}+\frac{g{m}^2}{C_3{C}_4}}\times \frac{s^2+\frac{g{m}^2}{C_5{C}_6}}{s^2+\frac{s}{R_5{C}_5}+\frac{g{m}^2}{C_5{C}_6}}\times \frac{s^2+\frac{g{m}^2}{C_7{C}_8}}{s^2+\frac{s}{R_7{C}_7}+\frac{g{m}^2}{C_7{C}_8}}$$ (10)

The filter's parameters can be expressed in Eqs. (11) and (12) as:

$$Pole-frequencies:f_{01}=\frac{g_m}{2\pi }\sqrt{\frac{1}{C_1{C}_2}};f_{02}=\frac{g_m}{2\pi }\sqrt{\frac{1}{C_3{C}_4}};f_{03}=\frac{g_m}{2\pi }\sqrt{\frac{1}{C_5{C}_6}};f_{04}=\frac{g_m}{2\pi }\sqrt{\frac{1}{C_7{C}_8}}$$ (11)

$$Qualityfactors:Q_1=g_m{R}_1\sqrt{\frac{C_1}{C_2}};Q_2=g_m{R}_3\sqrt{\frac{C_3}{C_4}};Q_3=g_m{R}_5\sqrt{\frac{C_5}{C_6}};Q_4=g_m{R}_7\sqrt{\frac{C_7}{C_8}}$$ (12)

Much like the parameters of the notch filter, these comb filter's parameters can be independently tuned to cater to specific requirements.

Validation

The suggested notch and comb filters of Figs. 3 and 5 are simulated using PSPICE. The analog building block of these filters, VDCC, is implemented using two high-performance ICs, MAX435 and AD844, in the simulation and the hardware implementation. IC MAX435 and IC AD844 are OTA (Operational Transconductance Amplifier) and CFOA (Current Feedback Operational Amplifier) ICs, respectively. These two ICs are cascaded to implement a versatile current-mode building block, VDCC. The simulation setup of the IC-based VDCC implementation is shown in Fig. 2. This setup is used for the simulation and hardware implementation of the proposed notch and comb filter. For the proper biasing of these ICs, power supplies are taken as V_DD= +10V and V_SS= -10 V. The transconductance gain, gm, of the VDCC is set by resistor R₁ of Fig. 2 using a predefined relation between g_m and limiting resistor R1 as g_m= 4/R₁. From this relation, gm can be calculated as 454.54 µA/V. This g_m value has been used for the simulation and hardware implementation of VDCC-based filters. The resistor R₂ used in Fig. 2 is the set resistor of IC MAX435. The value of R₂ is carefully chosen as 4.7 kΩ. The terminals of VDCC, P, N, Z, X, and W, are made as the input-output ports and have been used in the VDCC block. The same block has been used to simulate notch and comb filters, shown in Fig. 3 and Fig. 5, respectively.

First, the notch filter has been designed for a pole frequency of 50Hz and a quality factor of 10 to suppress the 50Hz PLI effectively. For this design, the passive components (capacitors and resistors) used in Fig. 3 are chosen as C₁= 362 nF, C₂= 5.8 µF, R₁= 5.5 kΩ, and R₂= 2.2 kΩ. As discussed above, the transconductance gain of VDCC, gm, is set to a value of 454.54 µA/V. In Fig. 6, Fig. 7, you can observe the notch filter's simulated magnitude and phase responses. These responses vividly demonstrate the remarkable efficacy of the proposed notch filter in attenuating the fifty-hertz power line interference with a high degree of precision and sharp notching. In magnitude response, shown in Fig. 6, a notch depth of -45.7dB is obtained, effectively suppressing the 50Hz PLI. Phase response, shown in Fig. 7, shows a sharp phase change of 360⁰ from 0⁰ to -360⁰ at the pole frequency.

Fig. 6.

Magnitude frequency response of the notch filter.

Fig. 7.

Phase frequency response of the notch filter.

The proposed comb filter, shown in Fig. 5, has been simulated with the same setup of VDCC. The values of passive components (capacitors and resistors) used in Fig. 5 are given in Table 1. With these values of capacitors and resistors, the four cascaded notch filters are set for the pole frequency of 50 Hz, 250 Hz, and 350 Hz and quality factors of 10, 20, 30, and 40, respectively. The magnitude response corresponding to these settings is visually depicted in Fig. 8.

Table 1.

Values of passive components.

Sr. No.	Passive Component Values	Pole frequency (f0)	Quality Factor (Q0)
1	C1 = 362 nF, C2 = 5.8 µF, R1 = 5.5 kΩ, R2 = 2.2kΩ	50Hz	10
2	C3 = 96.46 nF, C4 = 2.4 µF, R3 = 8.8 kΩ, R4 = 2.2kΩ	150Hz	20
3	C5 = 48.23 nF, C6 = 1.74 µF, R5 = 11 kΩ, R6 = 2.2kΩ	250Hz	30
4	C7 = 29.53nF, C8= 1.45µF, R7 = 12.54 kΩ, R8 = 2.2 kΩ	350Hz	40

Fig. 8.

Magnitude frequency response of the comb filter.

A sinusoidal waveform is run through the suggested comb filter to assess its effectiveness in the time domain. The frequency and the amplitude are taken as 50Hz and 100mV, respectively. The 50Hz waveform resembles the 50Hz PLI, whereas 100mV amplitude is sufficient to resemble the amplitude of PLI in low-frequency, low-amplitude biological signals. The input and output waveforms are shown in Fig. 9. It can be seen that the 50Hz input signal is well suppressed after some settling time, as expected. It verifies in real-time how well the suggested comb filter performs.

Fig. 9.

Time domain response of the comb filter.

Conclusion

A VDCC-based analog comb filter is designed to suppress unwanted power-line interference from biomedical signals like electrocardiogram (ECG), electroencephalogram (EEG), and electromyogram (EMG). The filter is designed by cascading four notch filters of pole frequencies set at 50 Hz, 150 Hz, 250 Hz, and 350 Hz, each having quality factors of 10, 20, 30, and 40, respectively. By setting these pole frequencies and quality factors, it is observed in the simulation that the filter effectively suppresses the 50Hz power-line interference and its three consecutive odd harmonics of 150 Hz, 250 Hz, and 350 Hz. The filter is simulated using macro-models of integrated circuits MAX435 and AD844. The filter circuit uses fewer active and passive components. Also, this filter's architecture can achieve the high-quality factor for the sharp notching of the 50 Hz power-line interference (Table 2).

Table 2.

Comparision of VDCC and Non-VDCC comb filter.

Ref. No.	Active block	Number of Active Component	Number of Passive Components
3	Op-Amp	OpAmp = 5	Resistor = 18 Capacitor = 8
4	Op-Amp	OpAmp = 5	Resistor = 18 Capacitor = 8
5	OTA	OTA = 10	Capacitor = 8
6	CCII	CCII = 9	Resistor = 19 Capacitor = 8
7	CCII	OpAmp = 11	Resistor = 11 Capacitor = 8
8	CCII	OpAmp = 17	Resistor = 17 Capacitor = 8
9	VDCC	VDCC = 4	Resistor = 8 Capacitor = 8

Future scope

The filter's active building block, VDCC, can be implemented with the latest CMOS technology parameters like 90nm, 45nm, and 22nm for fabricating the circuit in IC form. Further, there may be scope for reducing the number of passive and active components by introducing a new active building block.

Ethics statements

This research did not involve research on humans or animals, and no data is involved from social media platforms.

CRediT authorship contribution statement

Chandan Kumar Choubey: Conceptualization, Methodology, Visualization, Validation, Writing – review & editing, Writing – original draft. Sumit Kumar: Validation, Data curation, Supervision. Sanjeev Kumar Pippal: Visualization, Investigation.

Declaration of competing interest

The authors declare that they have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper.

Data availability

• No data was used for the research described in the article.