Synaptic Plasticity Engineering for Neural Precision, Temporal Learning, and Scalable Neuromorphic Systems

Highlights

• This review provides an in-depth discussion of computing-unit optimization through synaptic plasticity engineering, enabling precise weight modulation in spatial models and effective temporal information processing in dynamic neural networks.

• It delves into algorithmic advancement through plasticity modulation, improving accuracy, stability, and convergence in neuromorphic computing models.

• It explores resource-efficient neuromorphic architectures, integrating multifunctional devices, multimodal fusion, and heterogeneous arrays for scalable, low-power, and generalizable intelligent systems.

Abstract

Manipulating the expression of synaptic plasticity in neuromorphic devices provides essential foundations for developing intelligent, adaptive hardware systems. In recent years, advances have shifted from static emulation toward dynamic, network-oriented plasticity design, offering enhanced computational accuracy and functional relevance. This review highlights how diversified plasticity behaviors, including multilevel long-term potentiation and depression for spatial models, tunable short-term memory for temporal models, as well as wavelength-selective response, excitatory and inhibitory synergy, and adaptive threshold modulation, collectively support key tasks such as stable learning, temporal processing, and context-aware adaptation. Beyond behavioral innovations, strategies such as multifunctional single-device integration, multimodal fusion, and heterogeneous system assembly enable compact, energy-efficient, and versatile neuromorphic architectures. Recent developments at the array level further demonstrate high-performance scalability and system-level applicability. Despite notable progress, current modulation strategies remain constrained in flexibility, diversity, and large-scale coordination. Future research should focus on enriching the behavioral repertoire of plasticity, advancing cross-modal convergence, and improving array-level uniformity, paving the way toward deployable, high-efficiency neuromorphic intelligence.

Introduction

Driven by the rapid evolution of brain-inspired intelligence and the proliferation of ubiquitous intelligent terminals, neuromorphic devices and networks are increasingly recognized as the foundational hardware underpinning next-generation artificial intelligence (AI) systems [1]. Neuromorphic engineering, situated at the intersection of neuroscience, materials science, electronics, and AI, aims to emulate the multiscale information processing and adaptive learning capabilities intrinsic to biological neural systems [2–5]. By overcoming the fundamental limitations of traditional von Neumann architectures, such as high energy consumption, the separation of memory and computation, and data transfer bottlenecks, neuromorphic hardware aspires to integrate sensing, memory, and computing within unified physical substrates [6–8]. This vision unlocks new possibilities for building AI systems that are energy-efficient and adaptive, as well as deployable in resource-constrained, edge, and extreme-environment scenarios [9–11].

Two functionally differentiated but equally critical research directions have emerged to meet the unique requirements of static and dynamic neural architectures [12, 13]. For spatial-domain, weight-driven networks such as convolutional neural networks (CNNs) and multilayer perceptrons (MLPs), the emphasis is placed on achieving precise, stable, and symmetric modulation of synaptic weights [14]. To support accurate and scalable training and inference in neuromorphic networks, long-term memory (LTM) synaptic devices must exhibit high-resolution analog weight states, minimal nonlinearity, excellent long-term retention, and strong environmental drift resistance [15]. Substantial progress has been made in this area, as demonstrated by advances in multilayer memristors, ferroelectric synapses, and two-dimensional heterostructure devices, which collectively offer excellent linearity, multistate modulation, and symmetry [16–18]. In parallel, solid-state ionic systems have demonstrated outstanding endurance and drift resistance, further supporting the feasibility of deploying these devices in large-scale neuromorphic arrays [19, 20].

On the other hand, temporally dynamic architectures such as reservoir computing (RC) and spiking neural networks (SNNs) require devices capable of emulating transient synaptic behaviors that support time-domain information processing [21]. Short-term memory (STM), paired-pulse facilitation (PPF), and spike-timing-dependent plasticity (STDP) are critical for encoding spatiotemporal correlations and enabling event-driven learning [15, 22, 23]. To address these requirements, researchers have developed neuromorphic devices that emulate such behaviors through a variety of mechanisms. Notable advances include fully quantum dot optoelectronic memristors, photon-avalanche nanocrystal-based synapses, and hybrid organic transistor systems [24–26]. These devices offer tunable memory windows, nonlinear temporal dynamics, and dynamic threshold modulation, features that render them highly suitable for real-time pattern recognition, sequence prediction, and low-power adaptive computing [27].

Earlier research mainly emphasized synaptic behaviors at the single-device level. However, the translation of these advances into network- and system-level benefits has been comparatively underexplored. In contrast, this review emphasizes how diverse synaptic plasticity mechanisms can directly enhance neural network algorithm optimization, resource efficiency, and generalization (Fig. 1). Recent advances in wavelength-selective plasticity, excitatory and inhibitory synergy, and dynamically tunable metaplasticity demonstrate significant algorithmic implications [28–34]. Wavelength-selective synapses facilitate targeted spectral perception and intrinsic noise filtering, streamlining neural network algorithms by reducing preprocessing complexity and enhancing robustness under noisy, real-world conditions [35]. Excitatory and inhibitory cooperative synapses, mirroring biological receptive fields, realize spatial attention mechanisms at the hardware level, prioritizing critical inputs and suppressing irrelevant signals, thus reducing computational overhead and improving recognition accuracy even under constrained computational budgets [36]. Additionally, dynamically adjustable threshold plasticity and metaplasticity enable neural networks to modulate learning sensitivity and response thresholds based on environmental variability and historical activity, accelerating model convergence, reducing required training epochs, and enhancing adaptability to uncertain conditions [37].

Fig. 1.

Overview of this review. Neuromorphic Units. Reproduced with permission [35].

Copyright 2023, The Authors. Advanced Science published by Wiley‐VCH GmbH. Reproduced with permission [36]. Copyright 2024, Wiley–VCH GmbH. Reproduced with permission [37]. Copyright 2025, Wiley‐VCH GmbH. Reproduced with permission [38]. Copyright 2024, The Author(s). Advanced Materials published by Wiley‐VCH GmbH. Reproduced with permission [39]. Copyright 2024, Wiley‐VCH GmbH. Reproduced with permission [40]. Copyright 2021, Wiley‐VCH GmbH. Model Optimization. Reproduced with permission [41]. Copyright 2024, Wiley‐VCH GmbH. Reproduced with permission [42]. Copyright 2024, Wiley‐VCH GmbH. Reproduced with permission [43]. Copyright 2025, The American Association for the Advancement of Science. Resource Strategies. Reproduced with permission [44]. Copyright 2024, The American Association for the Advancement of Science. Reproduced with permission [45]. Copyright 2024, American Chemical Society. Reproduced with permission [46]. Copyright 2024, The Authors. Advanced Materials published by Wiley‐VCH GmbH. System Integration. Reproduced with permission [47]. Copyright 2024, The Author(s). Advanced Materials Technologies published by Wiley–VCH GmbH. Reproduced with permission [48]. Copyright 2024, The American Association for the Advancement of Science. Reproduced with permission [49]. Copyright 2023, American Chemical Society

In parallel with the advancement of higher-order synaptic plasticity mechanisms, recent developments in multimodal integration, single-device multifunctionality, and heterogeneous component co-design have established powerful strategies for constructing energy-efficient, resource-compact neuromorphic systems [50–52]. Multimodal synaptic devices capable of responding to diverse stimuli such as light, pressure, gas, or humidity facilitate device-level information fusion and reduce data transfer overhead, supporting robust and low-latency perception in dynamic environments [53]. Multifunctional synapses emphasize internal behavioral richness, allowing single devices to concurrently exhibit various plasticity modes, significantly enhancing learning flexibility, reducing peripheral circuitry, and enabling task-adaptive learning under tight hardware constraints [54]. Complementing these approaches, heterogeneous integration architectures amalgamate sensory transducers, memory units, logic elements, and actuators into unified neuromorphic modules, supporting real-time closed-loop operations. Compared to monolithic systems, these heterogeneous platforms offer enhanced versatility, scalability, and task-specific configurability, essential for intelligent operation in power-constrained and bandwidth-limited environments [55].

The evolution of synaptic plasticity has shifted from early demonstrations emphasizing STM and LTM for precise weight updates in artificial synapses toward more sophisticated behaviors meeting emerging network training requirements, including multimodal integration, excitatory-inhibitory interactions, multifunctionality, and dynamic threshold modulation, thereby enabling enhanced model generalization and algorithm-level strategies for neuromorphic hardware, as illustrated in Fig. 2. Reflecting this conceptual trajectory, the review first examines the material and device engineering strategies that enable precise, stable, and high-resolution synaptic weight modulation. It then considers mechanisms of dynamic plasticity and threshold adaptation that are essential for temporal learning within RC and SNN architectures. Subsequent sections highlight higher-order synaptic behaviors such as wavelength selectivity, excitatory and inhibitory synergy, and metaplasticity, all of which play pivotal roles in enhancing algorithmic efficiency and adaptive learning. Further discussion addresses the impact of multifunctional and multimodal integration strategies in realizing compact, energy-efficient, and resource-conscious neuromorphic systems. The final section surveys recent advances in array-level integration and intelligent system demonstrations, underscoring the practical translation of these innovations into scalable and robust neuromorphic platforms.

Fig. 2.

Roadmap of synaptic plasticity engineering. Weight Plasticity. Reproduced with permission [53].

Copyright 2010, American Chemical Society. Short-term memory (STM) and long-term memory (LTM) Plasticity. Reproduced with permission [54]. Copyright 2017, WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim. Multifunctional Plasticity. Reproduced with permission [55]. Copyright 2019, American Chemical Society. Multimodal Plasticity. Reproduced with permission [56]. Copyright 2021, The Authors. InfoMat published by UESTC and John Wiley & Sons Australia, Ltd. Heterogeneous Plasticity. Reproduced with permission [57]. Copyright 2022, The Authors. Advanced Optical Materials published by Wiley‐VCH GmbH. Dynamic Plasticity. Reproduced with permission [43]. Copyright 2025, The American Association for the Advancement of Science

Synaptic Engineering for Analog Weight States

High-fidelity, multistate, and stable synaptic plasticity is the cornerstone of weight-driven neural networks [58]. Realizing analog conductance tuning with linear and symmetric long-term potentiation (LTP) and long-term depression (LTD) enables precise parameter updates, which are essential for achieving high-accuracy and robust learning performance [59]. In this context, expanding the resolution and linearity of synaptic weights and ensuring long-term weight stability and drift resistance have become parallel priorities in the development of advanced artificial synaptic devices. Together, these two facets underpin reliable weight mapping, efficient training convergence, and the scalable deployment of neuromorphic hardware in large-scale, parameter-driven networks.

Multistate and Symmetric Weights

The realization of high-resolution, multistate, and linearly/symmetrically tunable weight modulation is fundamental to advancing artificial synaptic devices for neuromorphic computing [60]. In biological networks, the ability to finely and continuously modulate synaptic strength underpins the complex adaptive learning behavior of the brain, serving as an essential blueprint for weight-driven neural architectures such as convolutional and multilayer perceptrons [61]. In hardware implementations, this translates into the need for synaptic devices that can provide abundant, reproducible, and evenly spaced conductance states with minimal nonlinearity and variation, thereby ensuring precise weight mapping and stable training convergence [62]. Consequently, material and device engineering has been directed toward strategies that enhance the density, linearity, and symmetry of accessible conductance states, laying the foundation for high-accuracy and reliable performance in large-scale neuromorphic networks.

Among the early breakthroughs, Tian et al. reported an organic ferroelectric transistor synapse with a poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)]/MoS₂ structure, in which polarization-driven switching enabled more than 1000 quasi-continuous conductance states, providing a robust platform for precise and scalable weight modulation [63]. Subsequent efforts explored organic heterojunction synapses, for example, vertical p-n devices based on p-type poly(2,5-bis(2-octyldodecyl)-3,4-dicyanothiophene) (PDPP4T) and naphthalene tetracarboxylic diimide derivative (NTCDI-F15), which utilized enhanced exciton dissociation and suppressed recombination to achieve several hundred clearly separable potentiation-depression states with low LTP nonlinearity [64, 65]. In parallel, ferroelectric phototransistors based on α-In₂Se₃ exploited dynamic interfacial polarization switching, enabling highly symmetric, optically controlled bidirectional weight updates [66]. Along with innovations in quantum dot devices and charge transfer modulation, these advances have greatly broadened the palette for analog weight expression and conductance state engineering.

Nevertheless, persistent challenges, including residual nonlinearity, device variability, and incomplete symmetry, continue to hinder the widespread deployment of these systems in large-scale, high-accuracy neural networks. As a result, recent research has increasingly focused on optimizing a diverse range of material platforms, including organic, ferroelectric, two-dimensional, and heterostructure systems, each offering unique opportunities for achieving robust, high-density, and precisely controllable multistate weight expression [67].

A compelling example of this progression is found in the two-dimensional violet phosphorus (VP)–molybdenum disulfide (MoS₂) heterostructure synaptic device, which sets a new benchmark for analog synaptic performance in neuromorphic computing [38]. The system-level significance of these advances is directly demonstrated through neural network simulations of image classification tasks: as shown in Fig. 3a, the synaptic weights of the VP-MoS₂ device are mapped into a multilayer network model comprising 40,000 W_IH and 1,000 W_HO synapses, with both the training and inference stages faithfully emulating deep learning frameworks. The evolution of weight distributions before and after training (Fig. 3b) underscores the capacity of high-resolution analog weights to realize sharp and robust separation within large-scale networks. Crucially, systematic variation of dynamic range (DR) and state number (Fig. 3c) reveals that both parameters exert a decisive influence on classification accuracy: once DR drops below 20 dB, performance degrades precipitously, illustrating the fundamental necessity of high-fidelity, multistate synaptic mapping for complex pattern recognition. At the device level, the VP-MoS₂ heterostructure leverages the wide bandgap and pronounced light–matter interactions of VP to achieve an ultrahigh dark-to-light ratio (> 10⁶), a dynamic range exceeding 60 dB, and 128 (7-bit) clearly separated conductance states (Fig. 3d, e). This exceptional state density is complemented by the device’s ability to support optically driven LTP and electrically driven LTD, both exhibiting highly reproducible and linear transitions across repeated programming cycles. The ultralow off-state current effectively minimizes weight mapping errors, a critical consideration for high-accuracy network applications.

Fig. 3.

Multistate weight modulation and stability in neuromorphic synaptic devices. a Schematic of the multilayer neural network mapped from violet phosphorus (VP)-molybdenum disulfide (MoS₂) synaptic devices. b Simulated weight distributions before and after training. c Classification accuracy versus dynamic range (DR) and state number. d Normalized long-term potentiation and depression (LTP/LTD) curves for VP-MoS₂. e Representative waveforms for individual conductance states. a-e Reproduced with permission [35].

Copyright 2023 The Authors. Advanced Science published by Wiley‐VCH GmbH. f Neural network simulation using Bi₂V_0.9Cu_0.1O_5.35 (BICUVOX)/La_0.5Sr_0.5FeO_3-δ (LSF50) device weights for Modified National Institute of Standards and Technology (MNIST) digit recognition. g Linearity and symmetry of 50 potentiation/depression pulses. h Linearity and symmetry over all cycles. f–h Reproduced with permission [36]. Copyright 2024, Wiley–VCH GmbH. i Sketch of metal/ferroelectric/metal/insulator/semiconductor (MFMIS) memcapacitor array. j Robust retention of 3-bit capacitance states. k Cycle-to-cycle variation of high/low capacitance states. j-k Reproduced with permission [68]. Copyright 2023, The Authors. Exploration published by Henan University and John Wiley & Sons Australia, Ltd

To realize multistate, symmetric weights, evidence across material platforms points to a clear progression. Symmetric carrier injection barriers, shallow and narrowly distributed traps, and well-passivated interfaces produce monotonic, nearly uniform, and mirror-symmetric conductance updates. Ferroelectric channels then supply rapid and reversible polarization that avoids slow ionic drift, while organic and two-dimensional heterojunctions use interfacial charge transfer to suppress nonlinearity. Stability is reinforced by ion-blocking interlayers and robust dielectrics, which curb long-term drift and cycle-to-cycle variation. Wide bandgap channel stacks with ultralow off-state current further enlarge the dynamic range and raise the signal-to-noise ratio, reducing weight mapping error.

Stable and Drift-Resistant Weights

The pursuit of highly stable, drift-resistant synaptic weight modulation stands as a foundational requirement for neuromorphic hardware targeting large-scale, weight-driven neural network applications [69]. Biological synapses possess the remarkable capacity for reliable and long-lasting information retention, a property underpinned by sophisticated ionic dynamics and homeostatic regulatory mechanisms [70]. In contrast, many artificial synaptic devices suffer from conductance drift, cycle-to-cycle variability, and progressive degradation under repeated operation or environmental fluctuations, which compromise weight precision, hinder training convergence, and limit system endurance [71, 72]. Addressing these challenges has thus become a central motif in synaptic device innovation, particularly as next-generation AI architectures demand robust in-memory computing platforms capable of both high-precision storage and operational endurance.

To overcome the volatility and reproducibility bottlenecks of conventional memristors, the community has developed a rich diversity of material and interface strategies aimed at suppressing drift and enhancing cycle stability [73]. For example, electrochemical synaptic transistors, especially those leveraging solid-state ionic conductors, have enabled finely tunable and highly stable analog weights through deterministic ion migration mechanisms. Among these, devices based on lithium- and proton-conducting electrolytes exhibit rapid switching and reasonable retention but are often hampered by environmental sensitivity and limited compatibility with standard CMOS processes [39, 68, 74].

Amidst these diverse approaches, a pivotal advance is exemplified by the solid-state oxide-ion synaptic transistor based on a Bi₂V_0.9Cu_0.1O_5.35 (BICUVOX) electrolyte and La_0.5Sr_0.5FeO_3-δ (LSF50) channel [39]. At the system level, the impact of such stable weight modulation is vividly illustrated by neural network simulations: when the experimentally derived BICUVOX/LSF50 weight curves are mapped into an 8 $\times$ 8 or larger-scale artificial neural network, the resulting Modified National Institute of Standards and Technology (MNIST) digit recognition accuracy reaches 96% (Fig. 3f). This not only approaches the ideal software benchmark but also demonstrates that minimizing device drift and ensuring long-term analog stability can markedly reduce inference errors and support sustained high-accuracy operation in large-scale, weight-driven neural networks. The remarkable device-level performance of BICUVOX/LSF50 underpins this system-level accuracy. Specifically, the device leverages the high ionic conductivity and thermal/environmental stability of the BICUVOX film to achieve deterministic, reversible, and low-voltage modulation of synaptic weights. Unlike earlier oxide-ion or protonic transistors that suffered from high switching voltages and unreliable ion migration, the BICUVOX/LSF50 system operates at sub-1 V levels, ensuring stable oxide-ion motion and minimal stochasticity in weight updates. This architecture yields more than 100 discrete, linearly spaced conductance states (7-bit precision), with a nonlinearity factor of 0.3–1.7 and an asymmetric ratio as low as 0.03, metrics that directly reflect its capacity for highly symmetrical and repeatable LTP/LTD modulation (Fig. 3g, h). Notably, these features are retained over 5000 programming cycles and persist even under elevated temperatures, attesting to the robustness of the device in edge computing and harsh environmental scenarios. Complementarily, Feng et al. introduced a ferroelectric fin diode (FFD) that achieved an exceptional endurance of over 10¹⁰ switching cycles together with stable analog memory states, highlighting the critical role of ferroelectric domain engineering in suppressing drift and ensuring long-term reliability for in-memory computing [75].

In addition, Tian et al. reported a ferroelectric memcapacitor network based on a P(VDF-TrFE)-integrated metal/ferroelectric/metal/insulator/semiconductor (MFMIS) structure, in which the stacked MFMIS configuration (Fig. 3i) enabled reconfigurable multilevel capacitance states governed by ferroelectric domain dynamics [76]. Benefiting from uniform polarization-induced fields, the device achieved stable intermediate states with retention times exceeding 10⁴ s and endurance beyond 10⁹ switching cycles, as confirmed by both cycle-to-cycle stability tests (Fig. 3j, k). In comparison, other contemporary platforms have also made notable strides in device stability and endurance [68, 73]. The novel solid-state sodium alginate (NaAlg)/ polyacrylic acid (PAA)/indium gallium zinc oxide (IGZO) device introduces a polyacrylic acid interface to buffer Na⁺ ion dynamics, achieving 64 stable conductance states over 12,000 cycles and supporting high-fidelity pattern recognition. Similarly, ultra-flexible Si nanomembrane arrays integrated with hybrid polyimide-Al₂O₃ dielectrics maintain high linearity, ultra-low conductance fluctuation (< 1.6%), and excellent endurance even after 10,000 bending cycles, achieving digit recognition rates up to 93.2%.

Across studies, consistent evidence indicates that drift-resistant and reproducible analog weights arise when ionic transport is deterministic in chemically and thermally robust solids, operating voltages are kept in the subvolt regime to confine dynamics to reversible ranges, polarization is tightly controlled, and interfaces are buffered or passivated. Under these conditions, devices deliver monotonic, nearly uniform, and mirror-symmetric conductance states with low nonlinearity and low asymmetry, and they retain these characteristics over thousands of programming cycles and at elevated temperatures. Endurance extends from 10⁹ to 10¹⁰ switching events, with intermediate-state retention on the order of 10⁴ s.

Synaptic Engineering for Temporal Plasticity

The growing demand for neural networks that can process complex temporal signals in real-world environments has made dynamic synaptic plasticity central to the development of next-generation RC and SNNs [77]. Unlike conventional static architecture, temporal neural models require devices capable not only of rapid and reversible information encoding, but also of modulating memory retention and synaptic responsiveness on demand [78]. This shift presents two parallel challenges: first, how to implement tunable STM windows at the device level to enable real-time temporal correlation, and second, how to realize precise threshold and spike-timing-dependent plasticity for efficient event-driven learning and adaptive sequence recognition [79, 80].

Tunable STM Windows

In the era of intelligent sensing and ubiquitous Internet of Things, neuromorphic hardware capable of encoding and manipulating dynamic temporal information has become foundational for advancing time-dependent machine learning architectures such as RC and SNNs [81]. While traditional feedforward artificial neural networks are optimized for static tasks, they lack the intrinsic STM necessary to capture, store, and process the temporal correlations inherent in real-world signals. This gap has driven the development of synaptic device platforms that directly emulate the transient, volatile, and highly tunable memory windows exhibited by biological synapses, attributes that underpin the temporal perception and adaptive response in natural neural circuits [82]. Building on this foundation, physical reservoir computing offers a promising route. It leverages the intrinsic nonlinear response and fading memory (FM) dynamics of devices. Through these properties, temporal inputs are projected into a high-dimensional state space, where simple linear readout layers can efficiently extract spatiotemporal correlations. The optimization of STM window depth and adaptability is therefore crucial, since it determines the trade-off between memory retention and nonlinear transformation, enhances the richness of reservoir states, and ultimately improves temporal encoding capacity and computational efficiency for edge AI applications [83].

A diverse array of material systems and device strategies has emerged to address this challenge, each contributing unique mechanisms for STM modulation. Among these, the fully quantum dot optoelectronic memristor (FQDOM), constructed from a ZnO QDs/CdSe QDs/ZnO QDs heterojunction, exemplifies an integrated approach that unifies broadband photodetection (ultraviolet–visible (UV) to red spectrum), nonlinear STM decay, color selectivity, noise-tolerant preprocessing, and reservoir computation within a single two-terminal volatile device, as shown in Fig. 4a [40]. As a physical reservoir, the FQDOM achieves near-ideal performance in dynamic tasks: in letter classification, nonlinear temporal mapping of pulse-encoded images results in 100% recognition accuracy within fewer than 30 training cycles (Fig. 4b, c). Furthermore, the ability to tune memory decay and synaptic response by varying pulse number, intensity, and spectral content extends the diversity of accessible reservoir states, a critical enabler for high-dimensional temporal information processing (Fig. 4d).

Fig. 4.

Temporal dynamics for tunable STM in neuromorphic hardware. a Schematic of pulse-encoded letter/image classification using in-sensor reservoir computing (RC). b Training accuracy and loss curves for the fully quantum dot optoelectronic memristor (FQDOM)-based system. c Excitatory postsynaptic current (EPSC) responses of optoelectronic memristors under different pulse sequences. d Modulation of STM window in FQDOMs by varying light/electrical pulse parameters. a-d Reproduced with permission [37].

Copyright 2025, Wiley‐VCH GmbH. e Paired-pulse facilitation (PPF) and transient photon-avalanche (PA) luminescence in nanocrystal-based all-optical synapses. Reproduced with permission [82]. Copyright 2023, The Authors. Advanced Materials published by Wiley‐VCH GmbH. f Schematic and current outputs of nonlinear dynamic task solving with core–shell upconversion nanoparticles (UCNP@SiO₂)/ poly(3-hexylthiophene) (P3HT) reservoir. g Dynamic reservoir responses under different near-infrared (NIR) input and programmed states. h Prediction accuracy with increasing reservoir state diversity. f–h Reproduced with permission [38]. Copyright 2024, The Author(s). Advanced Materials published by Wiley‐VCH GmbH

Parallel innovations in all-optical synaptic platforms, such as photon-avalanche (PA) nanocrystals, leverage excited-state absorption and energy looping within upconversion nanoparticles to yield ultrasteep nonlinear luminescence dynamics and robust STM behavior [84]. The PA system demonstrates an exceptionally high PPF index that depends sensitively on inter-pulse delay (Fig. 4e), faithfully replicating the FM enhancement observed in biological synapses. Such all-optical synaptic models not only enable dynamic feature extraction and temporal summation in pure photonic domains but also facilitate hardware-embedded preprocessing for sequence-based neuromorphic computing, eliminating the need for external network training.

Extending the STM paradigm to the near-infrared, Leng et al. introduced a hybrid transistor architecture based on core–shell upconversion nanoparticles (UCNPs@SiO₂) embedded in a poly(3-hexylthiophene) (P3HT) channel [41]. This device exploits photon-electron coupling and electrical programming to achieve multilevel nonvolatile conductance states (≥ 8), adjustable relaxation times, and rich nonlinear and asymmetric memory dynamics under narrow-band near-infrared (NIR) stimulation. The resulting reservoir enables in situ encoding and computation for both static and dynamic pattern recognition, achieving, for instance, 91.13% accuracy in static digit classification and a normalized mean squared error as low as 1.06 × 10^–3 in predicting complex nonlinear dynamic sequences (Fig. 4f–h). Crucially, the expansion of reservoir states via variable programming and optical input parameters translates directly to enhanced prediction accuracy and adaptability in time-dependent computational tasks, highlighting the value of tunable STM windows and multimodal input fusion for temporal neuromorphic platforms.

Across neuromorphic platforms, the aim is to realize tunable temporal memory and coding that support reservoir computing and spiking models operating on real-world time-varying signals. When devices combine intrinsic nonlinearity with fading memory dynamics and allow on-demand modulation of retention and responsiveness, temporal inputs are embedded into high-dimensional state trajectories that preserve temporal correlations while remaining linearly decodable. Heterojunction stacks, core–shell photonic architectures, and engineered energy-transfer pathways stabilize excited-state kinetics and broaden spectral responsivity, yielding controllable volatility with reduced environmental sensitivity. Controlling pulse number, amplitude, width, inter-pulse interval, and spectral content tunes short-term memory depth and relaxation times, enhances temporal summation, and expands the accessible reservoir state space.

Spike-Timing Plasticity

The pursuit of hardware-efficient SNNs has elevated dynamic threshold modulation and STDP to the forefront of neuromorphic device innovation [85]. Biological systems leverage precisely timed spiking and adaptive membrane thresholds to achieve energy-efficient encoding and rapid learning of temporal patterns [86]. In this context, SNNs introduce the principle of event-driven computation, where neurons accumulate inputs until a dynamic threshold is reached and emit discrete spikes that encode information in their timing and frequency [87]. Through STDP, the precise correlation between pre- and postsynaptic spikes enables local and unsupervised weight updates, which not only replicate biological learning rules but also enhance the temporal precision, energy efficiency, and adaptability of hardware SNNs [88].

Emulating these dynamics in hardware, however, remains a formidable challenge, particularly in the compact, low-power integration of leaky-integrate-and-fire (LIF) neuron behavior, spike frequency adaptation, and direction-selective learning. While early CMOS- and MOSFET-based artificial neurons provided proof-of-concept LIF operation, they were hindered by high power consumption and bulky form factors [89]. To address these limitations, recent research has focused on developing novel device architectures and material systems that more closely emulate the rich temporal dynamics of biological neurons and synapses. Of particular interest are steep-slope, energy-efficient devices and co-integrated systems capable of precise temporal information processing and unsupervised learning. Among these advances, device-level innovations that directly implement both LIF spiking and synaptic plasticity within scalable, low-power hardware have demonstrated particularly promise for next-generation SNNs [90].

Choi et al. proposed a significant breakthrough by demonstrating fully two-dimensional material-based SNNs that integrate WSe₂ impact-ionization ferroelectric FET (I²FET) neurons with α-In₂Se₃/hexagonal boron nitride (h-BN)/CuInP₂S₆ (CIPS) ferroelectric FET (FeFET) synapses in Fig. 5a [42]. Notably, this platform achieved an impressive 87.5% accuracy in unsupervised face classification after only 20 training epochs, substantially outperforming typical low-parameter SNNs (Fig. 5b). At the device level, the 2D (I²FET neuron exploits a locally ungated, high-field region within the tungsten diselenide (WSe₂) channel to enable abrupt, sub-microsecond avalanche spiking at ultralow energy consumption (~ 2 pJ/spike), a 20- to 5000-fold reduction compared to conventional silicon neuron circuits (Fig. 5c). This architecture ensures linear spike-frequency modulation with input bias, conferring robust event-driven adaptability and precise threshold dynamics, critical for real-time temporal coding and event detection, as shown in Fig. 5d. System-level integration with FeFET synapses allows each artificial neuron to perform both spatial and spatiotemporal integration of distributed, asynchronously timed inputs, faithfully recapitulating dendritic computation and gating in biological systems (Fig. 5e). Experiments demonstrate that individual subthreshold inputs may be insufficient to trigger a spike, while coincident or temporally proximate inputs summate efficiently to elicit firing, underscoring the network’s ability to capture complex temporal features with high selectivity.

Fig. 5.

Spiking neural networks (SNN) implementation and device mechanisms for dynamic threshold modulation and spike-timing-dependent plasticity (STDP). a Simulation of face classification with a 2D SNN: spiking neural network scheme for 32 × 32 grayscale image recognition, including crossbar layouts (unsupervised and supervised layers) and device-based pseudo-crossbar array design with α-In₂Se₃ ferroelectric transistor (FeFET) synapses and tungsten diselenide (WSe₂) impact-ionization transistor (I²FET) neurons. b Recognition rate of the SNN as a function of the number of training epochs. c Leaky-integrate-and-fire (LIF) operation of I²FET neuron. d Spiking characteristics and frequency modulation of the I²FE neuron. a-e Reproduced with permission [39].

Copyright 2024, Wiley‐VCH GmbH. e Spatiotemporal summation and circuit integration in the SNN. f FeFET network for associative memory and one-shot pattern completion. g Demonstration of Hebbian plasticity: SRDP and STDP in FeFET synapses. h Associative learning realized by the FeFET synaptic network. f–h Reproduced with permission [40]. Copyright 2021, Wiley‐VCH GmbH

Equally remarkable, the MoS₂-based ferroelectric synaptic transistor associative spiking neural network (aSNN) demonstrates state-of-the-art associative memory and one-shot completion capabilities [43]. In digit completion tasks, the aSNN can accurately reconstruct entire patterns from partial cues, achieving a classification accuracy of up to 91.13% in static digit tests, surpassing traditional iterative associative networks (Fig. 5f). At the device level, the ferroelectric synapse harnesses gate-controlled domain wall dynamics to enable analog, symmetric, and linear weight modulation with sub-femtojoule energy per event, supporting a full suite of short-term repetitive depression/potentiation (SRDP) and STDP learning rules (Fig. 5g), where the relative timing of pre- and postsynaptic spikes governs LTP or LTD. This permits on-device, unsupervised Hebbian learning and LTM retention (Fig. 5h).

In neuromorphic hardware, an important direction is hardware-efficient, event-driven computation achieved by coupling adaptive thresholding with STDP. Deterministic leaky-integrate-and-fire neurons with linear rate control, paired with synapses that deliver analog, symmetric, and linear weight updates from precise spike timing, enable accurate temporal coding and local unsupervised learning. High field regions, ferroelectric or dielectric domain control, and interface passivation stabilize thresholds and plasticity kinetics while limiting leakage and variability. Tuning threshold set points and adaptation, shaping spike timing and intervals, and operating at latency and per spike energy improve efficiency and selectivity. Co-integrating steep-slope neuron devices with low energy, timing-sensitive synapses, aligning STDP windows to task time constants, and maintaining low voltage operation yield robust coincidence detection, associative recall, and competitive accuracy with few training epochs for edge-scale temporal intelligence.

Synaptic Engineering for Context-Aware Sensory Gating

The realization of robust, intelligent sensory perception in neuromorphic systems increasingly depends on the ability to selectively extract salient features, suppress interference, and flexibly adapt to complex, dynamic environments [91, 92]. Achieving these functions at the hardware level requires artificial synaptic devices that go beyond simple signal transduction, integrating a rich diversity of programmable plasticity mechanisms for context-aware information processing [93]. Rather than relying on fixed or single-modal responses, state-of-the-art sensory synaptic architectures must dynamically encode spectral, spatial, and contextual cues to enable high-fidelity feature encoding, efficient attention, and adaptive learning in the presence of noise and uncertainty [94, 95].

Wavelength-Selective Response

The capacity for wavelength-selective perception and encoding is foundational for the advanced feature extraction and robust information processing demanded by next-generation neuromorphic vision systems [96, 97]. Biological retinas achieve these functions through diversified photoreceptor responses, most notably, the selective encoding of colors by rod and cone cells, to filter redundant background signals and accentuate task-relevant spectral features [98, 99]. This architecture enables color discrimination and noise-tolerant recognition even in challenging and complex environments [28, 100]. Motivated by this natural paradigm, artificial visual synapses are being engineered to exhibit customized photoresponse windows and spectrum-specific memory retention, with innovations encompassing ion-doped perovskite nanocrystals, molecular cocrystal networks, π-π hybrid nanocomposites, and plasmonic 2D heterostructures, thereby unlocking new directions for hardware-level, context-aware spectral processing [44, 101–103].

Recent research highlights a flourishing diversity of underlying mechanisms for wavelength-specific synaptic plasticity, as exemplified by several representative works. In the study by Dong et al., the perylene-7,7,8,8-tetracyanoquinodimethane (TCNQ) molecular cocrystal nanowire (MCN) synapse leverages highly ordered donor–acceptor charge transfer to achieve both broadband UV–Vis-NIR responsivity and efficient exciton dissociation [101]. As illustrated in Fig. 6a, their MCN synaptic sensor array is tightly integrated with a CNN, forming a complete workflow for blue-targeted image preprocessing and high-precision feature recognition. The quantitative advantage of this scheme is reflected in Fig. 6b, where denoising red–green Gaussian-corrupted MNIST images using the MCN array increases recognition accuracy from only 12% (raw input) to 90%, close to the performance on clean data. The material’s robust broadband photoresponse across 365–1050 nm is further demonstrated in Fig. 6c, while Fig. 6d underscores the device’s selective and strong excitatory postsynaptic current (EPSC) response under pulsed blue (455 nm) light, essential for targeted blue feature isolation from complex backgrounds.

Fig. 6.

Wavelength-selective synaptic plasticity for spectral perception and feature encoding. a Schematic of molecular cocrystal nanowire (MCN) synaptic sensor array and convolutional neural networks (CNN) for image denoising and color feature extraction. b Denoising with MCN array in noisy MNIST images. c MCN synapse exhibits broadband photoresponse under ultraviolet–visible (UV), visible, and NIR light. d Selective EPSC response of MCN synapse to red, green, and blue light pulses. a-d Reproduced with permission [96].

Copyright 2025, American Chemical Society. e Schematics of eagle-inspired dual-band visual fusion and optoelectronic vision array for multiwavelength sensing. f Image fusion sensor in motion recognition and spatiotemporal information capture. g Dual-band fusion sensors across various dynamic tasks. e–g Reproduced with permission [41]. Copyright 2024, Wiley‐VCH GmbH. h Sequential letter videos drive fullerene (C₆₀)@graphene oxide (GO) array, with final frame current used for classification. i Output currents of C₆₀@GO array during sequential letter input encode spatiotemporal dynamics. j Normalized feature vectors from the final frame enable sequence-specific classification. k Device demonstrates robust, monotonic temporal mapping over repeated trials. l Lightweight CNN based on temporal readout of the device array. h–l Reproduced with permission [97]. Copyright 2025, The Author(s). Advanced Science published by Wiley‐VCH GmbH

For dynamic and motion-rich environments, Huang et al. advance the field with a plasmon-enhanced 2D MoS₂ neuron array, drawing direct inspiration from the architecture of eagle eyes [44]. Figure 6e depicts the schematic of the eagle-inspired visual system, emphasizing the role of short axons and dual-wavelength integration, key principles guiding the design of their hybrid plasmonic/2D semiconductor optoelectronic neuron arrays. Figure 6f contrasts the imaging outcomes of conventional, visible-only, NIR-only, and dual-band fusion sensors, revealing that dual-band fusion yields the most information-rich spatiotemporal frames for motion analysis. This systematic advantage is clearly quantified in Fig. 6g, where recognition of four different motion types with the neural network reaches near-perfect accuracy (≈ 99.8%) using fused visible-NIR inputs, dramatically surpassing all single-band and conventional approach and highlighting the practical impact of biomimetic, multispectral sensing.

Addressing the challenge of sequence-dependent visual information encoding, Liu et al. developed a π-π coupled fullerene (C₆₀)/graphene oxide (GO) heterosynaptic array, implemented in a 5 $\times$ 5 configuration for real-time video-based recognition [102]. Figure 6h presents the experimental scheme, where sequential letter inputs generate distinctive spatiotemporal current maps within the device array. The array’s capacity to accumulate and store temporal information is evidenced in Fig. 6i, with the output for the final frame (“E”) reflecting the memory of the full stimulus sequence. Figure 6j further details the classification vectors, where each word produces unique feature maps as a function of prior input. Figure 6k demonstrates the device’s robust, monotonic current variation with pulse number, supporting precise and noise-resistant temporal mapping. Ultimately, as summarized in Fig. 6l, a lightweight CNN readout trained on these temporal signatures delivers a dynamic video recognition accuracy of 97.3%, confirming both excellent generalization and high noise robustness.

Across neuromorphic vision platforms, the objective is wavelength-selective sensing and encoding that support robust feature extraction. Spectrally tailored absorption, efficient exciton dynamics, and photogating, combined with plasmonic coupling or π stacking, produce spectrum-specific plasticity and retention that suppress background while emphasizing salient cues. Donor acceptor cocrystals, plasmonic and two-dimensional heterostructures, and π-stacked composites define photoresponse windows, enhance local fields, stabilize spectrum-specific memory, expand dynamic range, and improve readout signal to noise; tuning pulse number, amplitude, interval, and spectral content adjusts short-term memory depth and spatiotemporal mapping. Prioritizing stacks that couple spectrum-specific gain with controllable retention, and matching device time constants to task timescales, yields noise-tolerant color and motion perception that lightweight readout networks can decode.

Excitatory and Inhibitory Synergy

The evolution of neuromorphic visual systems is fundamentally driven by the pursuit of artificial retinas capable of emulating the human eye’s sophisticated balance of feature enhancement and noise suppression [104]. In biological vision, the retina achieves high-fidelity perception through the orchestrated synergy of excitatory and inhibitory pathways in bipolar and ganglion cells, allowing for the selective amplification of salient cues, real-time dynamic background suppression, and spatially adaptive attention [105, 106]. This architecture not only underpins robust image preprocessing, such as edge detection, contrast enhancement, and motion sensitivity, but also facilitates energy-efficient, context-aware decision-making at the sensor level [107]. However, the majority of existing implementations still depend on hybrid electrical/optical control or unidirectional (predominantly excitatory) modulation, which constrains their capacity for real-time, low-power, and context-aware attention mechanisms, especially when precise bidirectional (excitatory and inhibitory) spatial encoding is required for tasks such as edge detection, motion discrimination, and dynamic background suppression [108, 109].

While artificial synaptic devices, especially optoelectronic memristors, have enabled progress toward this biomimetic goal, most conventional systems still rely on hybrid electrical/optical modulation or exhibit only unidirectional (excitatory) response profiles, thereby limiting their capacity to implement real-time, hardware-level attention and bidirectional spatial encoding [36]. Addressing these challenges, the field is experiencing a paradigm shift toward fully optical, symmetric bidirectional modulation of synaptic weights [110]. Such advances are rapidly setting new benchmarks for neuromorphic hardware by enabling spatially resolved, energy-efficient in-sensor computation, and providing direct analogs to biological processes of context-sensitive information filtering and feature selection [111].

A landmark advance in this direction is exemplified by the zinc oxide (ZnO)/zinc methyl 3-devinyl-3-hydroxymethyl-pyropheophorbide-a (Chl-A)/methyl 13¹-deoxo-13¹-dicyanomethylene-pyropheophorbide-a (Chl-D) heterojunction optoelectronic memristor, as proposed by Jiang et al. [45]. By leveraging spectrally selective photoionization and deionization of oxygen vacancies at the interface, this device enables precise, fully light-driven potentiation and inhibition, mirroring the antagonistic behavior of retinal bipolar cells. Figure 7a demonstrates distinct EPSC and inhibitory postsynaptic current (IPSC) responses under 430 and 730 nm light, respectively. The reversibility and stability of this bidirectional modulation, as evidenced in Fig. 7b, support robust LTP/LTD switching and underline the device’s potential for long-term synaptic encoding. Figure 7c extends these findings to array-level image preprocessing: using a 5 $\times$ 5 memristor grid, image regions are selectively amplified or suppressed according to luminance, implementing spatial contrast enhancement and dynamic noise reduction directly at the hardware level. This center-surround antagonism, functionally analogous to biological receptive fields, is further supported by the hardware extraction of object edges (Fig. 7d), where the device-based edge maps closely parallel those generated by computational Canny operators. The Gaussian-like pixel distribution of processed images (Fig. 7e) and the high degree of experimental-computational agreement (Fig. 7f) provide quantitative validation of the biological plausibility and precision of this approach. For large-scale or high-resolution edge extraction, Fig. 7g details the construction of a 300 $\times$ 300 positive–negative conductance matrix, establishing the scalability and robustness of this optical strategy.

Fig. 7.

Excitatory and inhibitory synergy and spatial attention in neuromorphic vision systems. a Light-driven, reversible EPSC/ inhibitory postsynaptic current (IPSC) in zinc oxide (ZnO)/zinc methyl 3-devinyl-3-hydroxymethyl-pyropheophorbide-a (Chl-A)/methyl 13¹-deoxo-13¹-dicyanomethylene-pyropheophorbide-a (Chl-D) heterojunction memristor. b Robust bidirectional LTP/LTD switching under varying illumination. c 5 × 5 memristor array enables real-time image contrast enhancement and denoising. d Receptive field models for hardware edge detection. e Pixel distribution of 300 × 300 input image for edge extraction. f Hardware versus Canny operator edge detection, validating biological plausibility. g Large-scale edge extraction via superposed conductance matrices. a-g Reproduced with permission.

Copyright 2024, Wiley‐VCH GmbH. h Motion detection by sequential conductance subtraction in WSe₂/poly(vinylidene fluoride-trifluoroethylene) (P(VDF-TrFE)) sensors. Reproduced with permission [105]. Copyright 2024, American Chemical Society. i Region-specific optical gain control in indium tin oxide (ITO)/Nb:SrTiO₃ synapses. j Programmable spatial attention in a 3 × 3 synapse array with memory retention. k Accuracy curve shows improved accuracy with hardware attention. l Class activation mapping highlights key facial features. m Device-level attention boosts ORL facial recognition. i-m Reproduced with permission [106]. Copyright 2025, American Chemical Society

Crucially, this excitatory and inhibitory synergy is not limited to static feature enhancement but also underpins advanced dynamic feature selection. For example, in reconfigurable WSe₂/P(VDF-TrFE) neuromorphic vision sensors proposed by Dang et al., symmetric, nonvolatile bidirectional photocurrent states enable the encoding of temporal frame differences [112]. As shown in Fig. 7h, the subtraction of sequentially programmed positive and negative conductance matrices cancels static backgrounds and accentuates motion, directly mimicking ganglion cell dynamics and yielding high-accuracy gesture and trajectory recognition when integrated into neural networks.

Beyond basic edge and motion processing, the ability to dynamically weight spatial regions at the device level paves the way for high-level, hardware-based attention mechanisms. Wang et al. proposed indium tin oxide (ITO)/Nb:SrTiO₃ heterojunction synapses, where voltage-assisted optical modulation enables real-time, region-specific tuning of synaptic gain [113]. As depicted in Fig. 7i, a positive bias enhances the response of target regions, while a reverse bias suppresses irrelevant signals. Figure 7j illustrates this principle using a 3 $\times$ 3 device array, with spatially programmed voltages precisely focusing or defocusing attention. The effectiveness of this biomimetic attention mechanism is further confirmed in Fig. 7k, which uses a color confusion matrix to visualize classification results; pixel darkness directly maps to the accuracy of predicted categories, demonstrating that the artificial synapse substantially boosts recognition performance by extracting key information and suppressing background interference.

Building on these foundational mechanisms, the integration of artificial synaptic arrays with neural network models enables intelligent and robust recognition in complex environments. Figure 7l presents a system for high-precision facial recognition, where synaptic resistive states are mapped to critical facial features, and class activation mapping (CAM) visually identifies regions of highest relevance. The network’s learning curve, documented in Fig. 7m, shows that the incorporation of device-level attention raises recognition accuracy on the ORL dataset from 77 to 90% and reduces data load by 35%–65%, even under noise and spatial distortions. These results underscore not only the device’s precise attention-guided recognition capability but also its reliable cycle-to-cycle memory retention and adaptability to real-world challenges.

Complementary progress is observed in all-optical cadmium sulfide (CdS)/graphene/Ge and tin selenide (SnSe) thin-film synapses, which offer continuously tunable, symmetric persistent photoconductivity (PPC) and negative photoconductivity (NPC) modulation and high-fidelity weight updating [114, 115]. These devices support advanced convolutional operations, real-time motion tracking, and integrated in-sensor computations, including Gaussian blurring, sharpening, and dynamic suppression, entirely within the photonic domain and without the need for complex digital conversion or additional circuitry. Collectively, these advances delineate a clear pathway toward fully integrated, scalable, and context-aware neuromorphic visual processors.

Progress in neuromorphic vision hinges on retinal-inspired, context-aware encoding that balances feature enhancement and noise suppression. Spectrally selective photoionization–deionization and photogating that realize fully optical, symmetric potentiation and inhibition, together with center-surround antagonism at the device or array level, amplify task-relevant spectral and spatial cues while suppressing background. Heterojunction stacks with engineered interfacial vacancies and bias-assisted optical gating define precise photoresponse windows, stabilize reversible LTP/LTD, and sustain spectrum-specific retention. Prioritizing fully light-driven symmetric weight control and receptive field antagonism, matching device kinetics to frame rates, and using region-specific gain raises recognition accuracy, reduces data load, and enables integrated, energy-efficient, context-aware vision.

Adaptive Threshold Modulation

The continuous evolution of neuromorphic computing is fundamentally driven by the aspiration to emulate the brain’s extraordinary capacity for adaptive learning, environmental robustness, and context-aware response, capabilities intrinsically rooted in the dynamic modulation of neuronal activation thresholds and higher-order metaplasticity [116]. In biological circuits, such threshold adaptation and metaplasticity underpin not only stable memory formation but also flexible, experience-driven learning in noisy or weak-signal environments [117]. Hardware realization of these functions has long been constrained by the static, first-order behavior of conventional synaptic devices, which often fail to reconcile low power, tunable thresholds, and biologically realistic learning dynamics [118]. Framed as a plasticity engineering strategy rather than a biological analogy, adaptive threshold control supports both neural precision and temporal learning [119]. For precision, programmable thresholds confine activations to informative ranges, suppress spurious activations in low contrast scenes, allocate dynamic range to salient inputs, and help preserve linear and symmetric weight updates; together, these effects improve separability, raise readout signal-to-noise ratio, and stabilize convergence in parameter-driven networks. These roles are consistent with metaplastic control in biology and with recent device strategies for threshold tuning in ferroelectric and related materials [88, 120]. For temporal learning, threshold adaptation shapes short-term memory windows, regulates spike rate and refractoriness, and sets the timing sensitivity required for sequence encoding and spike timing-dependent plasticity, thereby enhancing correlation capture and event selectivity in reservoir and spiking models [121–123]. Recent advances have yielded a diverse suite of material strategies and device architectures that directly implement tunable threshold and metaplastic behaviors, empowering artificial neural networks to adjust their sensitivity and learning rate in real time, a critical leap for handling low-contrast, noisy, or dynamically varying inputs in both convolutional and spiking models [124, 125].

A paradigm shift in adaptive hardware is exemplified by Wang et al.’s dual-adaptive heterojunction synaptic transistor, where photoadaptive threshold sliding and voltage-history-dependent metaplasticity are seamlessly integrated in a single organic p-n heterojunction [119]. Unlike earlier single-mode synaptic devices that implemented only photoadaptation or only history-dependent plasticity, this co-integration co-regulates input dynamic range and learning rate baselines within one element, reducing external contrast handling and calibration overhead and demonstrating a wider operating envelope across varying contrast and noise conditions. This system exhibits bidirectional photoconductivity: light-intensity-modulated photogating supports in-sensor preprocessing such as automatic contrast enhancement and edge sharpening, while dynamically lowering the synaptic depression threshold for adaptive memory erasure under strong illumination. Robust metaplasticity is achieved via unipolar spike-voltage-dependent plasticity (U-SVDP), allowing the LTP/LTD transition point to slide with stimulus history and incorporating an enhanced depression effect (EDE) that encodes experience-dependent inhibition. This second-order plasticity accelerates network convergence fivefold and increases CNN recognition accuracy from 91.2 to 93.8%, even under ultra-low contrast (down to 0.4%) and high noise, underscoring the critical role of threshold modulation in resilient neuromorphic learning.

In parallel, Zhang et al. address the rigidity of static transfer functions by introducing self-sensitizable artificial neurons based on perovskite nickelate (NdNiO₃), where adaptive hydrogen gradients enable dynamic modulation of spiking thresholds [126]. Plasticity-engineered threshold and gain control reshape the input acceptance range in real time, enabling seamless adaptation between low-intensity and high-intensity scenes and yielding an approximately 250% increase in processed structural information for complex scene detection and classification. These neurons deliver persistent, programmable excitability and selective noise filtering, ensuring robust edge detection and object recognition under substantial environmental drift.

Extending these concepts to multimodal sensing, Lv et al. present a humidity-responsive neuron using cyclo(-Tyr-Tyr) peptide nanowires, in which proton-coupled Ag⁺ migration supports humidity-dependent, ultra-low-voltage threshold switching (≤ 0.1 V) [127]. Mechanistically, ambient humidity increases proton activity in the peptide network, which lowers the activation barrier for Ag⁺ hopping so that each stimulus pulse drives reversible ionic accumulation and release, yielding conductance transients that map pulse amplitude or frequency into spike amplitude or rate. This enables analog environmental signals to be converted into strength-coded spike trains, closely mimicking biological hygroreception and spike encoding. When implemented in spiking networks, these humidity neurons achieve 92.68% diagnostic accuracy for respiratory disease classification, highlighting the expansion of adaptive thresholding to wearable health diagnostics.

At the ionic circuit level, Mei et al. advance transmembrane-potential-gated MXene ionic transistors that emulate voltage-gated conductance changes of biological ion channels [128]. Here, a gate-induced transmembrane potential across the lamellar MXene nanochannels sets the dynamic threshold by creating ion depletion or accumulation zones, while engineered structural asymmetry enables unipolar or ambipolar switching that yields selective excitation and inhibition. The resulting high on/off ratio (up to 2000) and reduced subthreshold swing (560 mV decade⁻¹) facilitate biomimetic spike processing, logic operations, and competitive learning in ion-based neuromorphic arrays.

Building on the landscape of adaptive threshold modulation and metaplasticity, Li et al. present a pioneering artificial neuron array that unites dynamic threshold tuning with biologically inspired double-opponent receptive field coding at the hardware level [46]. By enabling in situ orientation selectivity and flexible color opponency, this system achieves robust, spike-based feature extraction and preprocessing even under low-light or noisy conditions, directly enhancing the performance and environmental adaptability of downstream neuromorphic networks. Figure 8a frames the real-world challenge by illustrating an autonomous driving scenario under low-light conditions, where traditional vision systems experience substantial recognition failures. The introduction of the artificial neuron array, capable of double-opponent receptive field (DO RF) preprocessing, demonstrates a marked restoration of object detection through the extraction of robust NIR and UV boundaries. Moving to the core mechanism, Fig. 8b visualizes the biomimetic, elliptical DO receptive field inspired by the visual cortex, whose spatial and chromatic antagonism is mathematically described by a two-dimensional Gaussian derivative, providing the basis for enhanced edge selectivity.

Fig. 8.

Dynamically tunable threshold plasticity and metaplasticity in neuromorphic neuron arrays. a Low-light driving scenario demonstrating enhanced object detection via double-opponent receptive field (DO RF) preprocessing. b Biomimetic DO RF structure with spatial-chromatic antagonism. c Gate-voltage-tunable neuron array for orientation-selective edge detection. d Direction-dependent spiking outputs under angular color stimuli. e Hardware-processed edge images and raster plots under varied illumination. f Spike-encoded outputs preserve features at all brightness levels. g Classification accuracy of SNNs for preprocessed data. h Preprocessing accuracy under high noise. i Output current evolution across operational regimes as gate voltage (V_GS) varies. j UV-induced spiking and NIR inhibition at low V_GS. k NIR-induced spiking and UV inhibition at high V_GS, enabling double-opponent color coding. l Gate-controlled encoding range for UV and NIR stimuli. m Spiking frequency tunable range. a-m Reproduced with permission [43].

Copyright 2025, The American Association for the Advancement of Science

Device-level innovation is captured in Fig. 8c, where selective gate voltage tuning (V_GS at 2 V, 10 V, or − 5 V) configures the neuron array to respond maximally only to edges that align with the preferred orientation, achieving hardware-level context adaptation. This selectivity is substantiated in Fig. 8d, which quantifies the spiking output across input angles and shows a distinct peak only when the input matches the preset orientation, thus validating the direction-dependent coding. Figure 8e further demonstrates the practical impact of this hardware preprocessing: after passing through the array, image edges are sharply delineated across all brightness levels, as confirmed by inverted pixel images and orientation-labeled raster plots. Complementing this, Fig. 8f showcases the spike-encoded images under varying illumination, highlighting the system’s ability to maintain feature clarity for downstream computation. System-level advantages are then revealed in Fig. 8g, where preprocessed datasets fed into a convolutional SNN maintain high (> 90%) classification accuracy regardless of lighting, while non-preprocessed data see a drastic decline. This robustness is echoed in Fig. 8h, which shows that the preprocessed images consistently sustain around 80% accuracy even under heavy noise, a stark contrast to the near-complete degradation of unprocessed data. The underlying device dynamics are elucidated in Fig. 8i, mapping the evolution of output current across three operational regimes as V_GS is varied. Figure 8j, k deepens the picture by illustrating how UV and NIR inputs can be flexibly assigned as excitatory or inhibitory through precise V_GS modulation, thereby enabling biologically inspired, hardware-level double-opponent color processing. Figure 8l presents how the encoding range for each stimulus shifts as V_GS changes, and Fig. 8m underscores the extensive frequency tunability of the neuron’s spiking response, spanning from sub-Hz to 2.6 MHz.

Adaptive threshold dynamics operate as a plasticity engineering strategy that advances neural precision and temporal learning. Devices with tunable thresholds and metaplastic baselines regulate sensitivity and effective learning rate in real time, enabling symmetric weight updates, selective noise suppression, and timing alignment for sequence encoding. Across vacancy engineered heterojunctions, hydrogen gradient sensitized neurons, transmembrane-potential-gated ionic channels with designed asymmetry, and gate biased neuron arrays, thresholds remain stable yet history dependent at low voltage.

Synaptic Engineering for Resource-Efficient Integration

Building truly adaptive and efficient neuromorphic systems requires not only advanced synaptic plasticity, but also hardware strategies that enable the fusion, compression, and modular integration of multiple sensory and computational functions [129, 130]. In contrast to conventional architectures, where sensing, memory, and logic remain physically separated, next-generation neuromorphic hardware must achieve direct, in-device integration and reconfigurable coupling of heterogeneous modalities, mirroring the cross-modal connectivity and parallel processing of biological neural systems [131]. This technological evolution promises to dramatically reduce hardware redundancy and energy consumption, while enhancing environmental adaptability and system-level intelligence [132].

Device-Level Multimodal Fusion

Device-level multimodal fusion jointly encodes optical, mechanical, chemical, and environmental cues, including gas composition, temperature, and humidity, within a single, programmable synaptic pathway in the device front end. In synaptic transistors, multimodal inputs modulate the shared internal state of channel carrier density via spectral photogating with vacancy photoionization, strain or pressure induced modulation of contact or heterojunction barriers, surface redox and chemisorption, proton migration in hygroscopic dielectrics, and thermally assisted carrier or ion transport [133–138]. Writing multiple cues into the same synaptic state renders the update magnitude and polarity context dependent, enabling on-device gating and weighting that improves per-modality selectivity, extends effective dynamic range [50]. Signal compression at the device front end reduces energy and area and improves resilience to variations in illumination, temperature, and humidity [53]. Compared with single-modality synapses that sense one stimulus, multimodal synaptic transistors co-register cues within the channel and junction, enabling lighter readouts and more stable performance across diverse scenes [50]. In response, the latest generation of multimodal synaptic devices exemplifies a transformative strategy, compressing sensory input channels, fusing heterogeneous stimuli at the device level, and reducing the neural network parameter load at the system front end [139]. This allows not only a drastic reduction in sensor count and network size but also enhanced resilience and generalization in real-world complex scenarios.

A suite of representative works demonstrates the breadth and value of this approach. For instance, VP/MXene heterostructures combine photogating with adsorption-driven surface-potential tuning to achieve synergistic UV-gas dual-mode perception, enabling reconfigurable synaptic weights and dynamic memory adaptation to ambient changes; this balance between retention and selective forgetting supports adaptive perception [140]. Pentacene/P(VDF-TrFE)/Cs₂AgBiBr₆ hybrid systems couple optical and humidity cues at the device level, enabling real-time modulation of synaptic plasticity and memory preservation, which is directly applicable to emotion-state memory or adaptive environmental encoding [141]. Monolayer vacancy-induced oxidized (VO)-MXene-based synapses integrate visual and respiratory (humidity) stimuli, using dual channels for state-dependent weighting and emotional memory transitions, effectively mimicking context-dependent behavioral switching [142]. Olfactory-inspired in-sensor organic electrochemical transistors (OI-OECTs) consolidate chemical sensing, logic processing, and memory storage, dynamically switching between short- and long-term plasticity under varying gas concentrations, thus realizing ultra-low-power and robust chemical event detection [143]. These strategies collectively advance multimodal synaptic hardware toward generalized, resilient, and highly efficient AI perception systems, breaking the constraints of traditional, single-modality designs and pointing the way for real-world, edge-deployable intelligent interfaces.

Within this technological landscape, the artificial olfactory system (AOS) proposed by Song et al., which integrates human olfactory receptor nanodisks (hOR NDs) with a redox-active MoO₃-functionalized organic synaptic device (MOSD), marks a distinctive advance in molecular specificity and signal processing precision [47]. Drawing inspiration from the glomerulus and mitral cell hierarchy in the biological olfactory bulb, the AOS translates short-chain fatty acids (SCFAs)-induced conductance into high-dimensional 9 × 3 arrays (Fig. 9a), which are mapped onto a custom artificial neural network (ANN) (27 input, 14 hidden, 4 output neurons; Fig. 9b). This biomimetic refinement enables the system to rapidly achieve 100% recognition accuracy for single odorants (Fig. 9c), and accurately discriminate odorant mixtures via combinatorial conductance patterning and ANN inference (Fig. 9d, e). At the hardware level, the MOSD exploits programmable lithium ions (Li⁺)/ bis(trifluoromethanesulfonyl)imide (TFSI⁻) redox intercalation for stable and linear weight updates (Fig. 9f), yielding dramatically enhanced EPSC memory (∼700 s versus 5 s for pristine OSD; Fig. 9g) and minimized LTP/D nonlinearity (Fig. 9h). The hybrid AOS platform demonstrates hOR-specific conductance responses, remaining stable in the absence of odor (Fig. 9i, j) and providing sensitive, type-dependent readouts under SCFA exposure, with detection limits as low as 0.07 ppm (Fig. 9k, l). Principal component and fluorescence analyses confirm the molecular selectivity and reliability of odor recognition.

Fig. 9.

Biomimetic multimodal synaptic olfactory system and device-level characterization. a Schematic of data encoding in the artificial glomerulus-mitral cell network, mapping odorant stimuli into distinct conductance patterns. b Artificial neural network (ANN) for high-accuracy odor recognition. c Single-odorant recognition accuracy after training. d Conductance patterns and e recognition accuracy for odorant mixtures, validating combinatorial coding and robust inference. f Structure and operating principle of the MoO₃-organic synaptic device (MOSD) with programmable redox modulation. g EPSC memory retention in MOSD versus pristine device. h Linearity and symmetry of LTP/D in MOSD versus pristine device. i EPSC and j LTP/D in AOSs without short-chain fatty acids (SCFAs). k EPSC and l LTP/D responses under PA exposure. a-l Reproduced with permission [44].

Copyright 2024, The American Association for the Advancement of Science

Device-level multimodal fusion co-encodes heterogeneous sensory cues in a single synaptic pathway to deliver resource-efficient, noise-robust, context-aware perception. Optical, mechanical, chemical, and environmental inputs modulate a shared channel carrier density through photogating, chemisorption-driven surface potential shifts, and ionic transport, producing context-dependent thresholds and weight updates that increase selectivity, widen dynamic range, suppress cross-sensitivity, and compress data at the source. Heterojunction stacks, MXene lamellae, peptide nanowires, and redox-active electrolytes stabilize interfaces and support reversible storage, enabling linear, low-variance updates. Prioritizing front-end fusion improves accuracy with fewer sensors and lighter readouts, advancing neuromorphic olfaction and vision at the edge.

Single-Device Functional Integration

The pursuit of low-power, dense, and adaptable neuromorphic hardware has shifted attention to single-device functional integration, where sensing, memory, and elementary computation are implemented within one physical element operating under a single stimulus modality [144, 145]. This focus is distinct from multimodal integration, which fuses two or more physical modalities into a shared pathway. Here, emphasis is placed on single-device multifunctionality realized within one device. This direction targets the energy cost of disaggregated sensing-memory-compute chains whose split data flows inflate power at the edge, in wearables, and in Internet of Things (IoT) devices [146]. Current design, therefore, concentrates on compressing neural primitives into a single device through materials and architectural engineering, together with bias-programmable operating modes. By consolidating roles locally, these devices reduce peripheral circuitry and data movement, improve energy efficiency and area utilization, and do so while preserving analog linearity, symmetry, and endurance required for reliable learning [147].

A particularly striking electrical approach is exemplified by the ferroelectric tunnel junction (FTJ) synapse proposed by Nie et al., whose true significance lies in its ability to unify volatile and nonvolatile memory dynamics for robust, hardware-level sensor fusion [148]. The FTJ architecture (Fig. 10a) intricately combines ferroelectric polarization with oxygen vacancy migration, producing a device simultaneously capable of high-density, nonvolatile storage and fast, adaptive relaxation. This architecture enables dual-input fusion, as spatially divided array regions (Fig. 10b) encode image and speech modalities through positive and negative pulses, respectively, a direct hardware analog to biological multisensory convergence. Figure 10c details pixel-wise voltage pulse encoding, and Fig. 10d presents the reservoir's experimentally resolved current outputs during digit recognition, where clear multimodal state separation is observed. The seamless fusion of logic and adaptive memory in this design echoes the functional plasticity of neural circuits, underscoring a decisive leap beyond conventional, unimodal synaptic emulators.

Fig. 10.

Multifunctional and multimodal single-device neuromorphic platforms. a Schematic of unidirectional and bidirectional ferroelectric tunnel junction (FTJ) synapses for single- and dual-mode signal coding. b Multimodal digit recognition system: positive pulses encode images, negative pulses encode speech, with the cochlea-gram illustrating audio processing. c Input negative voltage sequence for voice encoding. d Experimental current response of the FTJ array during multimodal digit recognition. a-d Reproduced with permission [130].

Copyright 2025, Wiley–VCH GmbH. e Structure of reconfigurable MoS₂/hBN/graphene neuromorphic units integrating synaptic, neuronal, and dendritic functions. f EPSC triggered by optical pulse. g Integrate-and-fire response of the artificial neuron under voltage pulses. h Dendritic current response filtered by light. e–h Reproduced with permission [45]. Copyright 2024, American Chemical Society. i Three-mode photosensitive synaptic LED (PSSL) enabling programmable photodetection, logic, and synaptic light emission. j-l Encrypted light pulse information for different letters received by the bipolar photodetector mode. m Error pulse information received by the conventional unipolar light detector. i-m Reproduced with permission [131]. Copyright 2024, American Chemical Society. n Schematic of in situ convolutional transistor (In-SCT), showing input stimuli and conductance changes. o Device-level correspondence between conductance area and convolution result. p In-SCT array with stacked convolution layers for hierarchical in-memory computing. n-p Reproduced with permission [133]. Copyright 2024, Wiley–VCH GmbH

The theme of integrated neural computation is further advanced by the reconfigurable MoS₂/hBN/graphene neuromorphic unit introduced by Hu et al. [48]. This platform uniquely orchestrates synaptic, neuronal, and dendritic behaviors within a compact 2D heterostructure, enabling mode switching through selective biasing and multiterminal configuration (Fig. 10e). The device’s optoelectronic synaptic plasticity is elegantly demonstrated in Fig. 10f, while Fig. 10g captures its neuron-like integrate-and-fire response, essential for spiking neural network emulation. The capacity for hardware-level dendritic filtering and nonlinear logic is evidenced in Fig. 10h, where light-modulated currents realize both passive and active dendritic computations. This versatile architectural motif sets a new benchmark for the emulation of higher-order brain functions in hardware, with the potential to underpin densely reconfigurable, scalable neuromorphic systems.

In the realm of optoelectronic multifunctionality, the three-mode photosensitive synaptic LED (PSSL) platform offers an integrated solution for sensing, preprocessing, and logic-level information security [149]. Its device-level voltage programmability (Fig. 10i) permits seamless toggling among broadband photodetection, dual-polarity logic, and synaptic light emission, thus enabling both robust signal discrimination and neuromorphic processing within a single unit. The encoding of patterns into orthogonal red/UV optical channels is visualized in Fig. 10j, while the superposition and resultant cancelation of dual-wavelength signals for logic operations are shown in Fig. 10k, l. Most notably, Fig. 10m highlights that under simultaneous red and UV illumination, the bipolar photodetector outputs “0” to suppress interference, whereas a conventional device gives “1” and yields decoding errors (“111 111 110”). This highlights the PSSL's inherent superiority for secure, high-fidelity optical communication, where simple device-level operations achieve reliable encryption without algorithmic overhead. In addition, Wu et al. developed ferroelectric-defined reconfigurable MoTe₂ homojunctions using a P(VDF-TrFE) split gate dielectric to program local ferroelectric domains for tunable p-n/n-p junctions and analog weight storage [150]. The devices exhibited 17 stable positive and negative photoresponsivity states with long retention, and when assembled into a 3 $\times$ 3 array, they enabled concurrent sensing, memory, and computing, thereby realizing true single-device functional integration for low-power neuromorphic vision systems.

When it comes to in situ convolution computation, the in situ convolutional transistor (In-SCT) represents a watershed moment by merging analog convolution and synaptic memory within a single hardware node [151]. Its operational mechanism, based on dynamic carrier trapping and optoelectronic modulation, is outlined in Fig. 10n. More compellingly, Fig. 10o visualizes the mathematical equivalence between device conductance change and convolution area, a striking correspondence between device physics and algorithmic logic. Figure 10p extends this logic to demonstrate hierarchical stacking of convolutional operations within a single device/circuit, hinting at a future where memory and computation are inseparable at the hardware level. This approach dramatically reduces network area and power consumption, paving the way for ultra-compact, energy-efficient CNN implementations.

Beyond these, environmentally adaptive and spectrum-compressed synaptic devices contribute new dimensions of flexibility and task specificity. The In₂O₃·SnO₂/Nb:SrTiO₃ (ITO/NSTO) heterojunction optoelectronic synapse, for example, exemplifies the integration of in-sensor multimodal perception and real-time computation in a minimalist two-terminal design, foundational for robust temporal pattern recognition and low-latency AI in complex environments [152]. Organic memristors such as polymer switching material with triphenylamine and azobenzene (PFTPA-AZO) demonstrate the utility of molecularly engineered dual-mode operation, bridging fast in-sensor feature extraction and deep learning in memory, while Ag/ZnO_x/TiO_y/ITO environmental memristors reveal how physical responsiveness to electrical, thermal, and humidity cues can endow hardware with the context awareness and adaptability reminiscent of biological systems [153, 154]. The dual-mode silicon-on-insulator (SOI)/graphene photodetector, mimicking retinal cone-rod switching, achieves an ultrawide dynamic range, providing a resilient solution for vision under fluctuating illumination, a perennial challenge in autonomous perception [155]. Finally, flexible PbS QDs/polymethyl methacrylate (PMMA)-pentacene synaptic transistors, with broadband photoresponse and gate-tunable analog memory, provide in-sensor denoising and contrast normalization that reduces front-end parameter overhead and conversion/traffic burden, yielding more noise-robust classification for wearable, conformable vision systems [29].

Single-device functional integration concentrates sensing, memory, and elementary computation in one element under a single modality, reducing peripheral circuitry and data movement. By co-harvesting volatile and nonvolatile pathways in one stack, optoelectronic transduction with emissive readout, and bias-programmed operating regimes, the channel or junction serves as a unified state variable reconfigurable for sensing, plasticity, neuron-like integration, and logic with local preprocessing and storage. Ferroelectric domain engineering, vacancy control, split gate dielectrics, laminar two-dimensional heterostructures, and redox reservoirs stabilize interfaces, enable low-voltage operation, and sustain linear, low-variance updates. Functionally, selective spectral gain, programmable persistence, conductance-mapped analog convolution, and compact multiterminal layouts for dendritic filtering and spiking move computation to the source, lowering energy and area while preserving accuracy.

Multidevice Modular Integration

Multidevice modular integration refers to the co-design of locally coupled, functionally distinct blocks, for example, sensors, synaptic elements, neuron circuits, lightweight readouts, and actuators, into a resource-efficient module [156]. Emphasis is on co-location and interface alignment by matching bias ranges, conductance windows, and time constants, so sensing and preprocessing occur in the sensor, plasticity updates run near memory, and computing occurs [6]. This approach reduces conversion and interconnect overhead, improves task-level trade-offs among accuracy, latency, and energy, and scales by replicating standardized modules rather than enlarging monolithic systems [157]. This section, therefore, examines architectural patterns and device choices that support robust coupling, including sensors matched to synaptic dynamic range, synapses and neurons with aligned time constants, and memory and readout paths that preserve analog fidelity while remaining interoperable with digital controllers, enabling resource compact neuromorphic subsystems that are ready for deployment.

A key exemplar of heterogeneous integration is the CuInP₂S₆ (CIPS)/GaN ferroelectric high-electron mobility transistor (FeHEMT)-based artificial neuromuscular junction (NMJ) module, which physically unites synaptic plasticity, high-power actuation, environmental sensing, and hardware learning within a single closed loop [158]. As illustrated in Fig. 11a, the architecture draws direct inspiration from biological oculomotor systems, depicting the extraocular muscles responsible for adduction and abduction of the eyeball. Figure 11b details the system-level integration, where a microelectromechanical system (MEMS) mirror is directly driven by the FeHEMT, establishing amplifier-free, milliamperes-level actuation. The laser beam displacement, as mapped in Fig. 11c, visually confirms the precise, voltage-controlled mechanical steering achieved by the integrated module. Figure 11d quantitatively presents the relationship between gate voltage and steering angle, demonstrating proportional, analog control of the actuator via synaptic modulation. Figure 11e provides a critical benchmark, contrasting experimental steering angles with theoretical predictions and affirming the fidelity of this direct synapse-actuator pathway. Integration of real-time sensory feedback is achieved in Fig. 11f, where an ultrasound sensor is interfaced to the FeHEMT gate, enabling in situ distance measurement and conversion of environmental position data into actuation commands. Figure 11g documents the time-resolved tracking of a moving object: the FeHEMT’s output current dynamically modulates the MEMS mirror in response to positional inputs, allowing the system to track the trajectory of a mobile robot. Figure 11h analyzes tracking accuracy by plotting the symmetric absolute percentage error (sAPE) over time, revealing a significant error reduction after synaptic enhancement, a result of plasticity-induced transconductance gains. Figure 11i presents the phase relationship between input and output signals, showing that postenhancement, the system achieves closer temporal and amplitude matching, indicative of hardware-level learning and adaptive feedback. Figure 11j introduces the system’s ability to interface with a CMOS-based integrate-and-fire unit (IFU), depicting the circuit architecture for temporal spike integration and threshold-based firing. Figure 11k, l compares the output spike response before and after synaptic enhancement; the programmed state yields a marked reduction in output latency (from 297 to 152 μs), mirroring the accelerated reflexes observed in biological systems.

Fig. 11.

Modular multidevice units for physical functional integration. a Schematic of the biological oculomotor system. b Microelectromechanical system (MEMS) mirror actuation by CuInP₂S₆ (CIPS)/GaN ferroelectric high-electron mobility transistor (FeHEMT). c Laser displacement versus FeHEMT output. d Proportional control of steering angle by FeHEMT gate voltage. e Measured versus theoretical steering angles. f Ultrasound distance sensor enables object tracking. g Time-resolved tracking output. h Tracking absolute error (sAPE) analysis before and after synaptic enhancement. i Phase plot of motion input and output. j Schematic of FeHEMT-integrate-fire unit (IFU) integration for spike-based computation. Output spike latency k before and l after synaptic programming; enhancement halves response time. Reproduced with permission [140].

Copyright 2023, The American Association for the Advancement of Science. m Structure of memory optocoupler module for threshold-driven, light-mediated signal transfer. n Circuit diagram of neurotransmitter transfer memory optocoupler. Real-time optocoupler output under o subthreshold and p suprathreshold input. q Schematic of PSC-triggered action memory optocoupler integrated with tactile sensors. Device responses under r weak and s strong training. Reproduced with permission [46]. Copyright 2024, The Authors. Advanced Materials published by Wiley‐VCH GmbH

Moving to optoelectronic modules, Fig. 11m shows the memory optocoupler’s structural design: a long afterglow organic light-emitting transistors (LAOLET), an organic field-effect transistor (OSOFET), and a photodiode amplifier (PDA), configured for threshold-gated, light-driven information transfer [49]. Figure 11n diagrams the neurotransmitter transfer memory mechanism, wherein synaptic light emission from the LAOLET induces nonvolatile photomemory in the OSOFET, establishing a photonic bridge for inter-device signaling. Figure 11o records real-time device behavior under subthreshold stimulation, documenting the generation and rapid decay of volatile postsynaptic currents. By contrast, Fig. 11p captures the system response to suprathreshold input: the LAOLET’s long afterglow triggers persistent photomemory in the OSOFET, enabling the transition from transient to permanent memory encoding. To support logic-level operation, Fig. 11q presents the equivalent circuit of the memory optocoupler integrated with tactile sensors for multimodal training and reaction. Figure 11r describes a weak training scenario, wherein repeated low-voltage pressure input fails to elicit a downstream response due to insufficient postsynaptic current (PSC). Figure 11s details the outcome of strong training, where elevated PSCs activate sustained light emission and drive the PDA, resulting in a measurable current response to tactile stimulus, thus demonstrating device-level implementation of sensory learning, threshold gating, and logic-controlled action.

Complementing closed-loop sensor-actuator and memory-decision modules, other modes of heterointegration further broaden the horizons of neuromorphic hardware. The hemispherical Ag-TiO₂ nanocluster optoelectronic memristor array embodies geometry-aware integration, leveraging a curved substrate to achieve a wide field-of-view, in-sensor visual processing, and real-time binocular depth perception [159]. This platform unites all-optical synaptic modulation, spatial angle encoding, and event-driven computation within a single, conformable array, effectively emulating advanced retinal functions and supporting intelligent visual tasks unattainable by planar or unimodal devices. In parallel, van der Waals one-transistor–one-ferroelectric-memristor (1T1M) hybrid architectures exemplify device-level memory-logic co-integration. By combining multilevel ferroelectric switching with transistor gating, these structures overcome sneak-path and crosstalk bottlenecks, enabling robust, low-power in-memory computing and supporting hardware arithmetic alongside synaptic modulation [160]. Extending to macroscopic scales, fiber-based iontronic synapse networks enable distributed, programmable perception-actuation in smart textiles, illustrating how spatially and functionally distinct modules can be orchestrated to deliver adaptive, high-density neuromorphic systems [161]. Together, these complementary strategies highlight the critical importance of heterointegration as the foundation for resource-efficient, robust, and scalable AI.

Across multidevice modular integration, the goal is to co-design locally coupled heterogeneous blocks into resource-efficient neuromorphic modules that improve task accuracy, latency, and energy. Keeping sensing and preprocessing at the source, placing plasticity and matrix operations near memory, and using sparse event-driven links between modules reduces conversion and interconnect overhead while preserving analog fidelity. At the hardware level, options such as ferroelectric domains on wide bandgap channels, redox-active interlayers for photonic memory coupling, van der Waals 1T1M stacks with controlled contacts, hemispherical substrates for wide field mapping, and fiber-based ionic conduits stabilize interfaces, limit crosstalk and sneak paths, and sustain linear, low-variance updates, providing a practical route to deployable modular systems.

Synaptic Engineering for Scalable Arrays

Scaling from single synaptic devices to brain-inspired arrays exposes challenges that differ fundamentally from device-level studies. At the device statistics level, device-to-device variability, cycle-to-cycle stochasticity, update nonlinearity and asymmetry, limited state count, retention drift, and endurance spread accumulate over thousands to millions of cells and directly erode learning accuracy and convergence [162]. At the array physics level, passive crossbars suffer from sneak currents and half-select disturb, while line resistance and capacitance introduce voltage drop and timing skew; moving to one transistor one resistor (1T1R) mitigates sneak paths but imposes leakage, and matching constraints [163–165]. At the process and integration level, wafer-scale uniformity and back-end-of-line (BEOL)-compatible thermal budgets govern yield for ferroelectric and 2D stacks; interconnect resistance and 3D stacking add further constraints, and postbonding stress can degrade memory windows, making packaging and encapsulation critical for optoelectronic or environment-responsive and flexible arrays [166, 167].

Against this backdrop, the advance of intelligent and energy-efficient edge computing relies on synaptic arrays and integrated systems that offer scalable uniformity, multifunctional adaptability, and seamless links between sensing, computation, and action [168, 169]. Recent progress in high-uniformity single-device arrays, multifunctional heterostructures, and context-adaptive in-sensor computation enables robust memory encoding, dynamic plasticity, and efficient signal processing at both the pixel and system level [170]. Integrating multimodal sensing, memory, and logic within single devices and arrays now supports real-time cross-modal recognition and adaptive decision-making, while heterogeneous integration of memory, logic, and sensory modules enables closed-loop, low-power operation essential for IoT and autonomous applications. Together, these developments establish the foundation for intelligent, flexible, and resource-efficient neuromorphic hardware at the edge [171, 172].

High-Uniformity Arrays

Achieving high uniformity and scalability in synaptic arrays is critical for translating synaptic plasticity to robust neuromorphic systems [173]. At the array scale, uniform device statistics yield predictable pulse-to-weight transfer functions, consistent LTP/LTD kernels, and stable read margins, which in turn enable direct weight mapping from software models, reduce per-cell calibration, and improve matrix–vector accuracy under line parasitics and temperature drift. Device-to-device variability, nonlinearity, and fabrication defects hinder the mapping of plastic behaviors across large arrays. Emphasizing array-level uniformity shifts the focus from isolated device figures to system outcomes: higher mapping yield, consistent learning rules across tiles, lower programming time and peripheral energy, and improved reliability over long deployments. Recent strategies across material platforms have tackled these challenges effectively. For instance, a 28 × 28 floating-gate transistor array based on monolayer MoS₂ with Au nanoparticle charge-trap layers demonstrated excellent uniformity: on–off ratios around 10⁶ and mobility averaging ~ 8 cm² V⁻¹ s⁻¹ across 784 devices, permitting a single global programming schedule and straightforward weight transfer, which enabled optoelectronic handwriting encoding and achieving ~ 96.5% accuracy in digit recognition [174]. Likewise, fully screen‑printed, paper-based ZnO synaptic transistor arrays fabricated via low-temperature printing achieved large-area uniformity, environmental stability, and biodegradability. The tight row-to-row behavior supported uniform pulse schemes and stable read margins, enabling photoelectric synaptic behaviors such as paired-pulse facilitation and filtering, and achieved 91.4% recognition accuracy with ~ 3.7 pJ per synaptic event [175].

On the organic front, while organic conductive polymers such as poly(3,4-ethylenedioxythiophene) (PEDOT) offer inherent advantages for low-cost, large-area integration, conventional approaches remain constrained by multistep patterning and variability. The one-shot integrable electropolymerization (OSIEP) method, built on alternating-direct current (ADC) bipolar electrochemistry, fundamentally resolves these issues by enabling remote, maskless, and large-area growth of PEDOT/tetraborofluoroate (BF₄) channels on ultrathin substrates, yielding synaptic arrays with exceptional uniformity and simplified fabrication workflows [176]. Figure 12a illustrates the architecture of a three-terminal electrochemical synaptic transistor, specifically engineered to emulate the dynamic plasticity of biological synapses. Positive voltage pulses at the presynaptic terminal induce EMIM⁺ cation injection and PEDOT⁺ backbone de-doping within the channel, producing both short-term depression (STD) and LTD depending on pulse protocol. The transition from STD to LTD, manifested as persistent conductance suppression exceeding 100 s, directly mirrors the memory windows of biological synapses. Figure 12b details the LTD/LTP characteristics extracted under various pulse amplitudes, revealing how synaptic weight modulation is stimulus dependent. The extracted nonlinearity and step size parameters in Fig. 12c (depression) and 12d (potentiation) confirm that higher pulse amplitudes yield more linear and effective conductance modulation, which is critical for hardware-compatible neural learning rules. Critically for scalability, the array’s uniformity allowed the experimentally extracted LTD/LTP curves to serve as a single look-up table for weight updates across the network, avoiding per-cell fitting and ensuring consistent learning rules at scale. Moving from device to system, Fig. 12e depicts the neural network simulation architecture, a MLP designed for MNIST digit recognition, where the experimental LTD/LTP curves serve directly as weight-update profiles. The learning trajectory, as shown in Fig. 12f, demonstrates a rapid and robust ascent in test accuracy, ultimately reaching 95.2%, illustrating how array-level uniformity enables reliable weight mapping and system-level reliability, comparable to software-only training.

Fig. 12.

Scalable single-device synaptic arrays and multifunctional organic heterostructure arrays for neuromorphic hardware. a Schematic and operation mechanism of poly(3,4-ethylenedioxythiophene) (PEDOT):tetraborofluoroate (BF₄) synaptic transistor. b LTD/P modulation under varying pulse amplitudes. c Nonlinearity of depression. d Step size of potentiation. e Multilayer perceptrons (MLP) architecture for MNIST using hardware synapses. f Training accuracy curve. a-f Reproduced with permission [47].

Copyright 2024, The Author. Advanced Materials Technologies published by Wiley‐VCH GmbH. g 4-inch wafer with 520 devices/cm² organic heterostructure arrays. h Device structure and NIR semiconductor chemical structures. i Pixel-level grayscale inversion, smoothing, and edge enhancement. j NIR readout of letters through silicon wafers. k Noisy letter image dataset for classification. l Hardware classifier: pixel mapping and training. m Photocurrent outputs for letters. n Accuracy versus noise level. o Loss curve during training at different noise levels. g-o Reproduced with permission [157]. Copyright 2024, The Authors. Advanced Materials published by Wiley–VCH GmbH

Reconfigurable In-Sensor Arrays

The evolution of multifunctional and highly integrated device arrays is rapidly transforming the landscape of neuromorphic sensory hardware, enabling edge systems to break free from the energy and latency constraints inherent to traditional von Neumann architectures [177]. Organic photoelectronic devices, long celebrated for their flexibility, tunable bandgap, and biocompatibility, have shown unique potential for miniaturized, high-density vision platforms [178]. However, in most conventional organic synaptic devices, the input-to-output response is largely fixed by the material stack and processing, which limits the ability to reprogram gain, polarity, or persistence during operation; as a result, pixel-level dynamic reconfigurability, essential for intelligent sensory networks, is still difficult to achieve [179]. Here, reconfigurability is treated as plasticity. At the pixel and array levels, programming the responsivity sign and gain, the effective threshold, and the persistence window constitutes task-conditioned, higher-order plasticity that enhances neural precision and enables adaptive temporal learning. Recent efforts have focused on organic heterostructures and multifunctional device arrays that enable gate-tunable, bidirectional responses and pixel-level reconfigurability.

For example, Xu et al. realized gate‑tunable positive/negative NIR photoconductance in a photolithography‑compatible organic p-n heterostructure array (5 µm channel; ~ 520 devices cm⁻²), enabling pixel‑level filtering and in‑sensor classification with reported accuracy up to ~ 97% under NIR illumination [180]. Here, the gate acts as a metaplastic control that selects the weight sign and dynamic range per pixel, improving separability while keeping a consistent programming schedule across the array, which strengthens precision in weight mapping. Complementarily, Liu et al. demonstrated an all‑photolithography ion‑gated flexible organic transistor (OIGT) array that can be programmed between volatile and non‑volatile modes, supporting multimodal neuromorphic computing at low training cost, highlighting practical array‑level reconfigurability [181]. Switching between volatile and persistent states provides a tunable short- to long-term memory window, aligning device time constants with task dynamics and enabling temporal learning at the sensor plane.

In particular, organic p-n heterostructure arrays have demonstrated gate-tunable bidirectional photoresponses, providing a representative example of how pixel-level reconfigurability can be realized in practice [180]. As demonstrated in Fig. 12g, this approach yields a remarkable device integration density of 520 cm⁻² on a 4-inch wafer, with each channel miniaturized to just 5 μm, showcasing not only high areal density but also full compatibility with scalable photolithography. The device’s vertical bilayer architecture (Fig. 12h), comprising a partially overlapped p-type conjugated polymer and an n-type small molecule, is engineered via orthogonal solvents to realize a robust, gate-controlled, bidirectional NIR photoresponse, thereby encoding a programmable palette of synaptic weights and memory kernels inside the array.

The practical impact of this architecture is vividly illustrated in Fig. 12i, where individual pixel responsivities are mapped linearly to their respective gate voltages, allowing direct hardware realization of core image processing functions. Grayscale inversion, Gaussian smoothing, and Laplacian edge enhancement are all performed in situ, with experimental results that closely match the outcomes of ideal digital filter kernels, demonstrating the system’s flexibility and effectiveness for analog image preprocessing at the sensor level. Relative to digital preprocessing, these analog operations avoid early quantization, reduce conversion and data movement overhead, and provide continuous-valued kernels whose cutoff and gain can be tuned in real time. Figure 12j further shows that silicon's NIR transparency enables noninvasive readout through packaged devices, which extends analog preprocessing to secure or embedded settings without disturbing the front end.

At the algorithmic and systems level, the versatility of the heterostructure array is further exemplified by its ability to function as a real-time, noise-robust hardware classifier. Here, each pixel acts as a dynamic, trainable synaptic node, with V_G updated by error-gradient descent to encode weights for letter image recognition tasks (“z”, “v”, “n”) under varying Gaussian noise. The convergence and learning dynamics are further detailed in Fig. 12m, which shows that high-fidelity classification is achieved after only 3–4 epochs, even for significant noise levels. Quantitative benchmarking in Fig. 12n highlights the platform’s robustness, with classification accuracy peaking at 97.06% for σ = 0.2 and the VG distribution rapidly stabilizing through training; Fig. 12o records a correspondingly rapid drop in the loss function, underscoring the network’s efficiency and learning stability. These results position reconfigurability as plasticity engineering at scale. Programming the sign, gain, and persistence of weights improves neural precision, while tuning volatility provides task-matched temporal windows. Together, these capabilities enable adaptive, low-overhead preprocessing that conventional digital preprocessing chains struggle to deliver.

Multimodal Perception Arrays

The quest for adaptive multimodal neuromorphic sensing has driven the evolution of edge-intelligent hardware toward systems capable of real-time, high-dimensional perception and robust cross-modal learning [182, 183]. Traditional architectures, which compartmentalize sensing, memory, and computation, have proven inadequate for the demands of dynamic environments such as IoT-enabled pollution monitoring and autonomous robotics, where complexity, signal crosstalk, and nonlinearity prevail [184, 185].

Recent innovations have begun to bridge this gap. For instance, Talanti et al. developed a CMOS-integrated organic neuromorphic imager (640 × 512 pixels) capable of both frame-based imaging and synaptic-mode temporal sensing, with in-pixel memory retention over tens of minutes and hardware-level motion trajectory extraction using charge recombination dynamics [186]. Complementarily, He et al. demonstrated a multimodal electronic skin embedding organic transistors for simultaneous visual and tactile perception, achieving real‑time fusion of light and pressure signals within a compact neuromorphic array [187].

Building on this trajectory, Wu et al. pioneered a biomimetic olfactory neuron array, architected through the synergistic integration of an organic field-effect transistor (OFET) sensor array, in-sensor RC, and K-nearest neighbors (KNN) classification [188]. The design, as illustrated in Fig. 13a, depicts the hardware–software co-design, detailing the flow from OFET sensor signal acquisition to temporal encoding and RC-driven feature extraction, culminating in KNN-based gas classification. The experimental methodology for high-resolution gas fingerprinting is clarified in Fig. 13b, which presents the 32-point temporal response sampling protocol for each analyte, forming the foundational feature set for all subsequent classification.

Fig. 13.

Multimodal single-device arrays for cross-modal perception and intelligent recognition. a Schematic of a nine-channel organic field-effect transistor (OFET) sensor array integrated with reservoir computing and k-nearest neighbors (KNN). b Time-dependent response profiles of all sensors to 26 gases. c Classification accuracy versus sensor number. d Protocol and array response to 12 typical gas mixtures. e Confusion matrix for 26-class gas recognition. f KNN decision boundaries among isomer/homolog gas pairs in feature space. g Mobile robot equipped with the olfactory array for real-world groundwater pollutant detection. h Confusion matrix of pollutant recognition on 24 samples. a-h Reproduced with permission [164].

Copyright 2025, Wiley–VCH GmbH. i Schematic of a visual–tactile mechano-optical synaptic array for in-sensor multimodal computing. j Array output under separate and combined light/mechanical stimulation. k Schematic of pattern recognition using an ANN with unimodal and multimodal datasets. l Training curves of ANN accuracy. i-l Reproduced with permission [165]. Copyright 2025, Wiley–VCH GmbH

The impact of sensor diversity on classification performance is quantitatively demonstrated in Fig. 13c, where accuracy is plotted as a function of sensor array size: while single-sensor setups struggle (78.9%–98.1%), arrays comprising up to nine sensors achieve near-perfect discrimination (99.04%). The nuanced response behaviors, especially for gas mixtures, are further visualized in Fig. 13d, where nonadditive, nonlinear mixture signals underscore the necessity of multidimensional encoding and advanced feature extraction. Central to real-world application, the confusion matrix in Fig. 13e compellingly visualizes classification outcomes for the full 26-gas library, its dominant diagonal evidencing minimal misclassification and maximal specificity. The multidimensionality of the feature space and the robustness of boundary delineation are captured in Fig. 13f, which shows KNN-derived decision boundaries for 26 analytes on a pentacene-based sensor, with isomers and homologs clearly resolved as distinct clusters.

Transitioning to practical deployment, Fig. 13g schematizes the integration of the olfactory sensor array onto a robot dog platform for groundwater pollutant analysis, highlighting the augmentation of environmental intelligence through olfactory-visual sensor fusion. Experimental results, shown in Fig. 13h, provide a detailed breakdown of classification accuracy for individual pollutants and their mixtures, nitrobenzene (NB), dimethyl methylphosphonate (DMMP), isopropylamine (IPAm), and their binary combinations, where the KNN-based elimination voting model (KNN-EV) achieves 100% accuracy, again confirmed by the diagonal strength of the confusion matrix. This real-world demonstration validates the efficacy of in-sensor computation and memory in autonomous, resource-constrained contexts.

Expanding the scope to multimodal fusion at the device array level, Guo et al. engineer a 28 $\times$ 28-pixel mechano-optical synapse, whose fabrication and architecture are depicted in Fig. 3i [189]. The device enables simultaneous encoding of patterned light (visual) and mechanical (tactile) stimuli, mapped into a photo-stimulated luminescence (PSL)-based memory layer via mechanoluminescent (ML)-mediated luminescence transfer. The dynamical response to 30 consecutive pulses, mechanical, optical, and hybrid is chronologically charted in Fig. 13j, with early pulse data elucidating the pronounced enhancement resulting from synchronized force-light excitation. Integration with an ANN is visualized in Fig. 13k, where datasets are partitioned by sensory modality and the network structure (784 input neurons, 50 hidden, 5 output) is depicted, demonstrating the translation from array-level physical signals to computationally accessible features. The ultimate system-level performance is quantified in Fig. 13l, which tracks recognition accuracy across training epochs for tactile, visual, and visual–tactile modes, revealing a significant multimodal synergy: joint perception achieves a superior 92.5% accuracy, compared to 69.6% and 79.6% for unimodal inputs, respectively.

Heterogeneous Integration Arrays

The ongoing quest for edge-intelligent systems that seamlessly bridge perception, computation, and action has catalyzed the emergence of heterogeneous integration arrays, amalgamating diverse device functionalities to enable closed-loop, adaptive decision-making in dynamic environments. Traditional von Neumann architectures, marked by a physical separation between memory and logic units, have long been hindered by the inefficiency of data shuttling, an impediment exacerbated by the massive parallelism and high precision required in advanced AI tasks such as dynamic object tracking (DOT), tactile cognition, and real-time multimodal recognition [190–192]. In heterogeneous integration arrays, sensors, synapses, and neurons are co-designed to the target task, with dynamics chosen to match requirements and to enable effective coupling of sensing, memory, and computation. In response, computing-in-memory (CIM) paradigms based on emerging nonvolatile memories, memristors, phase-change memories, and particularly, ferroelectric field-effect transistors (FeFETs), have transformed the landscape by supporting in situ vector–matrix multiplication (VMM) and robust Boolean logic, yet single-modality arrays often fall short in meeting the multidimensional demands of autonomous agents and robotic platforms [43, 193].

Recent efforts have begun to demonstrate how heterogeneous device integration can embed not just memory and logic, but also perception–action coupling within a single hardware fabric. For example, Shan et al. constructed a hemispherical optoelectronic memristor array using Ag-titanium dioxide (TiO₂) nanoclusters, emulating binocular stereo vision and enabling in-pixel depth perception and motion detection via optical modulation and plasmonic effects [159]. Here, per-pixel optical gain and synaptic state jointly act as reconfigurable “meta-weights,” allowing depth cues and motion salience to be encoded before digitization, which reduces downstream calibration and preserves precision at scale. More recently, Wang et al. reported a vertically integrated tantalum-oxide (TaO_x) memristor with IGZO photodetector layers to create a spiking cone photoreceptor array (VISCP), achieving ultra-low power ($\le$ 400 pW), color-selective spiking responses, and hardware-level depth perception via spiking frequency differentials [194]. The spiking threshold and adaptation within the VISCP provide a tunable temporal gate, aligning sensor dynamics with sequence learning and thereby serving as an explicit temporal plasticity at the array level.

In particularly, Lu et al. engineered a wafer-scale, 2D MoS₂-HfO_x FeFET hybrid CIM system that monolithically integrates digital logic and analog multistage cell (MSC) arrays for analog VMM, achieving sub-femtojoule energy efficiency and a wafer-scale yield exceeding 96% [195]. The core hardware foundation is visually presented in Fig. 14a, which shows the fabricated 4 $\times$ 4 MSC array and its corresponding programmable weight matrix after precise row-by-row initialization, each cell supporting over 6-bit resolution and exceptional symmetry/linearity in conductance states. The platform’s device architecture and fabrication flow, including the solution-processable, wafer-scale growth of MoS₂ channels and high-k hafnium oxide interfaces, are outlined in Fig. 14b, highlighting the system’s CMOS compatibility and scalability. On the digital front, Fig. 14c depicts optical images and the actual circuit implementation of FeFET-based Boolean logic arrays and Schmitt triggers (STs), forming the digital building blocks for in-memory computation. The practical operation of these digital circuits is detailed in Fig. 14d, which presents the output characteristics for key logic gates (AND, OR, XOR, full adder), as well as dynamic waveform transformations enabled by the Schmitt trigger. Crucially, array-uniform FeFET weight states provide consistent LTP/LTD kernels for direct weight mapping, while the Schmitt trigger supplies a programmable threshold with hysteresis that functions as module-level metaplasticity, shaping spike timing and noise immunity for temporal tasks.

Fig. 14.

Heterogeneous integration arrays for neuromorphic sensing, computation, and action. a Optical image of 4 $\times$ 4 ferroelectric multistage cell (MSC) array and weight matrix. b Wafer-scale fabrication schematic for 2D MoS₂-HfO_x ferroelectric field-effect transistors (FeFETs). c Optical images and circuit diagrams of FeFET-based Boolean logic and Schmitt trigger (ST) arrays. d Output signals of FeFET logic gates and STs. e Waveform transformation by Schmitt trigger: analog to digital logic. f Digital computation with ferroelectric XNOR, convolution, and ST arrays for real-time object detection. g Analog CNN computation in MSC arrays for multilayer feature extraction and prediction. h Power consumption comparison: ferroelectric hybrid system versus conventional CPUs/GPUs. i Confusion matrix showing 99.8% dynamic object tracking (DOT) recognition accuracy. a-i Reproduced with permission [48].

Copyright 2024, The American Association for the Advancement of Science. j Schematic of tactile neuromorphic system integrating triboelectric sensor, microcontroller, and FeFET array. k Tactile Morse code recognition: signal generation, image encoding, and neural network classification. l Real-time voltage output for Morse code “A”, “B”, “C” and visual patterns. m Training/test dataset generation by randomization. n single-layer perceptron (SLP) recognition accuracy on Morse code versus epoch. o MLP recognition accuracy on MNIST versus epochs. j-o Reproduced with permission [49]. Copyright 2023, American Chemical Society

Transitioning to system-level functionality, Fig. 14e provides an explicit demonstration of the Schmitt trigger’s role in pulse shaping, showing the transformation of input triangular and sine waves, and the resulting rail-to-rail logic state transitions with ultrafast response and robust noise immunity. Building on this hybrid platform, the digital computing pipeline for dynamic object tracking is detailed in Fig. 14f, where ferroelectric XNOR logic, convolutional filtering, and Schmitt trigger arrays collaboratively enable real-time moving object detection and dynamic background suppression within the array. In parallel, Fig. 14g visualizes the analog computation conducted in the MSC-based CNN array, showcasing the multilayered feature extraction and trajectory prediction flow powered entirely by analog in-memory operations. The platform’s energy and accuracy advantages are compellingly summarized in Fig. 14h, which benchmarks the hybrid system against traditional CPU (Intel i9) and GPU (NVIDIA Tesla V100) architectures. The results reveal more than two orders of magnitude improvement in energy efficiency, while maintaining high accuracy. The confusion matrix in Fig. 14i further demonstrates the system’s average DOT recognition accuracy of 99.8%, affirming the feasibility of hardware-level, real-time visual intelligence. Taken together, the hybrid array demonstrates plasticity engineering by delivering precise, linear weight updates for high fidelity mapping and by providing tunable thresholding with persistence control for time-aligned learning.

To extend this paradigm to tactile cognition, Kim et al. realized a bioinspired tactile neuromorphic system by integrating a triboelectric Cu/ poly(dimethylsiloxane) (PDMS) sensor and a MoS₂/P(VDF-TrFE) FeFET synaptic array [196]. Figure 14j provides a schematic of the full tactile neuromorphic system, depicting the interaction between the triboelectric sensor, preprocessing microcontroller, and ferroelectric synaptic hardware, which together transduce tactile stimuli into structured electrical signals and process them in real time. For Morse code pattern recognition, Fig. 14k presents the system’s process and representative data, illustrating the conversion of tactile Morse code signals (“A”, “B”, “C”) into time-sequenced voltage patterns and their subsequent encoding as 20 $\times$ 20 visual maps for neural network input. Data augmentation, a key strategy for overcoming limited sample sets, is depicted in Fig. 14l, where randomized visualized Morse code images for the letter “K” exemplify robust data expansion and highlight how even significant noise does not obscure key pattern features. System-level recognition performance is quantitatively charted in Fig. 14m, which traces the evolution of single-layer perceptron (SLP) accuracy for Morse code learning and MLP accuracy for MNIST digit recognition, substantiating the system’s robustness and hardware efficiency. Figure 14n further summarizes the final recognition accuracy and confusion matrix, demonstrating high classification fidelity across all classes. Finally, Fig. 14o provides an additional benchmark by comparing the recognition accuracy of FeFET-based synaptic arrays with other synaptic device platforms, confirming their competitive advantage in both training convergence and generalization. In this tactile module, the synaptic array functions as a reconfigurable plastic substrate in which device-level domain polarization establishes stable, low-variance weights for precise mapping, and input rate-dependent integration, together with threshold adaptation, tunes the temporal window, thereby aligning plasticity with the statistics of tactile stimuli (Fig. 15).

Fig. 15.

Outlook for future directions in synaptic plasticity engineering, covering functional mechanisms, multimodal fusion, and array modulation. Reproduced with permission [43]. Copyright 2025, The American Association for the Advancement of Science. Reproduced with permission [44]. Copyright 2024, The American Association for the Advancement of Science. Reproduced with permission [48]. Copyright 2024, The American Association for the Advancement of Science. Reproduced with permission [105]. Copyright 2024, American Chemical Society. Multimodal Fusion. Reproduced with permission [126]. Copyright 2024, American Chemical Society. Reproduced with permission [164]. Copyright 2025, Wiley–VCH GmbH Copyright 2025, Wiley– VCH GmbH

Conclusion and Outlook

This review systematically classifies and discusses artificial synaptic devices with a focus on the functional differentiation of synaptic plasticity behaviors. By examining diverse synaptic behaviors such as high-resolution and multilevel LTP and LTD, STM and FM processes, excitatory and inhibitory synergy, wavelength selectivity, dynamic threshold modulation, and multimodal sensory adaptation, the review clarifies how each type of plasticity enables key computational features in neuromorphic networks. This functional perspective highlights the essential connection between tailored synaptic behaviors and advanced neural system performance. Through comparative analysis and representative examples, it becomes clear that the deliberate modulation of plasticity behaviors, whether for analog weight stabilization, tunable memory retention, or cross-modal fusion, forms the basis for constructing efficient, flexible, and adaptive brain-inspired computing systems. However, current modulation methods still exhibit limitations regarding flexibility, diversity, and overall adaptability, and much of the related research remains exploratory. Therefore, based on this systematic analysis, the following three aspects are identified as critical future development directions in synaptic plasticity modulation techniques.

Exploration of Novel Synaptic Plasticity Mechanisms

The exceptional intelligence of biological organisms primarily arises from the diverse and sophisticated plasticity mechanisms that operate within their nervous systems [61]. Compared with natural neural structures, artificial neuromorphic devices currently possess relatively simplistic and limited modulation mechanisms [2]. Specifically, existing synaptic plasticity research largely centers on basic transitions between STM and LTM states, modulation between excitatory and inhibitory synaptic activities, and optimization of linearity and symmetry in synaptic weight updating [15]. These relatively narrow modulation pathways significantly restrict the full potential and functionality of neuromorphic systems [197]. The limited scope of plasticity modulation is mainly attributed to the current absence of sufficiently rich and diverse physical mechanisms at the device level. Thus, future research should prioritize exploring and discovering new functional mechanisms, such as multithreshold dynamics, activity-dependent metaplasticity, selective plasticity gating, and biologically inspired heterosynaptic mechanisms, to expand the modulation versatility [198, 199]. Enriching the pool of available plasticity behaviors can effectively enhance the operational speed, power efficiency, computational flexibility, and adaptive learning capability of neuromorphic chips.

Multimodal Collaborative Plasticity Modulation Techniques

Future advancements in neuromorphic hardware require substantial progress in multimodal collaborative plasticity modulation, shifting away from single-sensory, isolated processing paradigms toward the seamless integration of diverse physical signals and functionalities. Inspired by the multisensory fusion and parallel processing capabilities of biological neural systems, novel device designs must effectively merge multiple sensory inputs, adaptive memory states, and computational functions at a device and module level [142]. Achieving this vision involves exploring advanced heterostructures, integrating sensing, logic, and memory into unified physical nodes, and developing reconfigurable modular units that dynamically emulate closed-loop biological perception–action pathways [152]. Such multimodal integration techniques will significantly enhance the adaptability, robustness, and resource efficiency of neuromorphic systems, laying critical groundwork for intelligent sensing and decision-making in real-world, resource-constrained environments.

Enhanced Plasticity Modulation Techniques for Large-Scale Neuromorphic Arrays

The practical deployment of neuromorphic computing relies critically on synaptic plasticity modulation methods tailored explicitly for scalable neural arrays. Although significant advancements in individual synaptic devices have been achieved, large-scale integration demands higher standards for uniformity, reproducibility, and stability of plasticity behaviors. To meet these requirements, future research should prioritize the development of advanced fabrication technologies and array-level modulation techniques that can reliably and uniformly regulate synaptic plasticity across extensive device arrays [200]. Furthermore, exploring gate-tunable and dynamically reconfigurable plasticity mechanisms, exemplified by multifunctional organic heterostructure arrays, will allow adaptive synaptic modulation essential for flexible, real-time neural computations [201]. Achieving these goals will significantly enhance the robustness, efficiency, and adaptability of large-scale neuromorphic systems, laying the groundwork for their broader application in intelligent edge computing.

Despite notable progress, current modulation strategies remain constrained in flexibility, diversity, and large-scale coordination. In particularly, application-facing advances should explicitly link device-level plasticity to task requirements-stable analog weights for high-accuracy learning, tunable short-term dynamics for temporal processing, and hardware attention for noise-resilient perception. Future research should focus on enriching the behavioral repertoire of plasticity, especially those supporting temporal learning, adaptive attention, and metaplastic threshold tuning, advancing cross-modal convergence and device-algorithm co-design to bridge device behaviors with network objectives, and improving array-level uniformity and variation-aware calibration for scalable integration and reliable operation in edge and resource-constrained environments. In parallel, standardized, task-linked benchmarks and device-to-network mapping protocols (linearity, symmetry, drift/temperature stability, STM windows, STDP, and threshold adaptability) are needed to ensure fair comparison and reproducible system-level gains. Together, these directions will pave the way toward deployable, high-efficiency neuromorphic intelligence. Priority application sandboxes—wearable health monitoring, low-light/night-vision perception, and extreme-environment sensing—can serve as near-term proving grounds for translating synaptic strategies into deployable systems.

Author Contributions

ZL contributed to conceptualization, investigation, original draft writing, and visualization. YF contributed to conceptualization, funding acquisition, review, and supervision. QL performed review and supervision. BT and CZ contributed to funding acquisition, review, and supervision.

Declarations

Conflict of interest

The authors declare no interest conflict. They have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper. Bobo Tian is an editorial board member for Nano-Micro Letters and was not involved in the editorial review or the decision to publish this article.