Abstract
Optical computing presents a promising avenue to meet the escalating computational demands. However, optical analog computing is susceptible to environmental perturbations, relies heavily on digital-to-analog converters and analog-to-digital converters, and requires electronic or photonic nonlinear operations. While optical digital computing mitigates some issues, its reliance on manual, task-specific configuration hinders broader applications like inference. Here, we propose the concept of an optical logic convolutional neural network (OLCNN). We demonstrate a 1-by-3 optical logic convolutional operator (OLCO) for pattern generation and validate its high-speed computing capacity at 20 Gbit/s. A 2-by-2 OLCO is then implemented to perform three types of image edge extraction. By scaling up, a 3-by-3 OLCO is constructed for an OLCNN to achieve four-class classification on the MNIST dataset with an average test accuracy of 95.1%. By synergizing optical logic devices with neural networks, this work pioneers a logic-driven paradigm for high-speed, energy-efficient optical hardware in artificial intelligence.
Optical logic convolutional operators enable pattern generation, edge extraction, and logic neural network inference.
INTRODUCTION
Convolutional neural networks (CNNs) have become a fundamental part of modern artificial intelligence (AI), driving revolutionary advances from computer vision (1) and speech recognition (2) to autonomous systems (3) and medical diagnostics (4). Their ability to automatically extract hierarchical features from raw data has brought breakthroughs in complex analytical tasks (5). With the increasing diversity and complexity of application scenarios like the large-scale model (6) and real-time object detection (7), CNNs demand ever more computing resources. However, traditional electronic hardware grapples with fundamental limitations in terms of power consumption, clock frequency, and latency (8–10). This widening performance gap between current hardware and the needs of modern deep-learning tasks has become a major bottleneck, necessitating the exploration of alternative computing paradigms.
Optical computing offers a promising alternative for AI tasks with low power consumption, high bandwidth, low latency, and inherent parallelism (11–13). Diverse optical methods have been used to construct optical neural networks (ONNs), including interference (14–16), diffraction (17–19), and multiplexing technology with dimensions of wavelength, time, and space (20–22), which demonstrate substantial advantages over electronic counterparts (23–25). However, the analog computing paradigm is inherently limited by its susceptibility to noise and demand for high precision. Implementation challenges arise primarily from the requirement for high-performance digital-to-analog converters (DACs) and analog-to-digital converters (ADCs), which introduce substantial hardware complexity and energy costs. Furthermore, many existing implementations predominantly handle linear transformations, while the execution of nonlinear activation functions remains tethered to conventional electronic components. Notwithstanding the efforts to incorporate nonlinear units into optical computing (26, 27), the associated overheads in power consumption and latency, coupled with inherent speed limitations, continue to impede further advancements in the overall system performance. These persistent challenges collectively undermine the core advantages of optical computing architectures on power consumption and latency, remaining major obstacles for practical AI deployment.
Compared with optical analog computing, optical digital computing exhibits superior compatibility with modern electronic digital computing and enhanced noise tolerance. Crucially, digital computing inherently incorporates nonlinear characteristics, which are essential for complex computation. Over recent decades, diverse optical logic operations have been realized using either all-optical (28–31) or electronic-optical methods (32–35), achieving various logic components like the multibit adder (36), multiplier (37), and comparator (38). The concept of the look-up table has also been introduced to implement logic functions, including associative search by the optical content-addressable memory (39–41) and programmable logic by the optical programmable logic array (PLA) (42–44). Nevertheless, current optical digital computing is typically designed for some specific tasks (45), relying on manually predefined operational rules rather than adaptive learning frameworks. Consequently, the application of photonic logic circuits to direct image processing and broader AI tasks remains unexplored.
Here, we propose a pioneering optical logic CNN (OLCNN) on the basis of optical PLAs, enabled by joint wavelength-space encoding for complete logic minterm generation. We first implement a 1-by-3 optical logic convolutional operator (OLCO) on the lithium-niobate-on-insulator (LNOI) platform. The elementary cellular automata (ECAs) are demonstrated to generate complex patterns by the 1-by-3 OLCO, validating the high-speed computing capability up to 20 Gbit/s. Thereafter, the microring-assisted delay interferometers (DIs) are adopted to construct a 2-by-2 OLCO on the silicon-on-insulator (SOI) platform, demonstrating three types of image edge extraction. Furthermore, a 3-by-3 OLCO with 256 wavelength channels and two spatial channels is realized, forming the foundation for OLCNNs that attain an average test accuracy of 95.1% on four-class MNIST (modified National Institute of Standards and Technology) classification tasks. To our knowledge, this work demonstrates realization of neural network inference through optical logic circuits. It shows distinct advantages, including seamless compatibility with electronic digital circuits, minimized requirements for ADCs and DACs, and elimination of nonlinear activation functions. The OLCNN architecture establishes a paradigm-shifting platform for photonic AI computing, offering a critical pathway to overcome the fundamental energy-efficiency limitations of analog ONNs.
RESULTS
Principle of the OLCNN
In general, a CNN is primarily composed of convolutional and fully connected layers, performing feature extraction and classification, respectively. Figure 1A illustrates a typical analog convolution operation with a 3-by-3 kernel. Given an input feature map X, the convolutional layer performs sliding computations using a k × k convolutional kernel, written as
| (1) |
where Wij represents the weight of the convolutional kernel. After the convolutional kernel, nonlinear activation is applied to enhance the network’s expressive capacity. The fully connected layer consists of multiple neurons. As an example, Fig. 1B presents a neuron with nine inputs, which first performs a weighted summation of the input data and then applies a nonlinear activation function. The operation of an n-input neuron can be expressed as
| (2) |
where f(.) is the nonlinear activation function, Xi is the input data, Wi is the corresponding weight parameter, and b is the bias term. In conventional CNNs, both convolutional and fully connected layers involve weighted summation and nonlinear activation. By contrast, our OLCNN requires only logic operations to manipulate binary input data. As shown in Fig. 1C, the logic convolutional kernel extracts data from the sliding window and applies the corresponding logic operation L(.). All input and output data are in binary format. The intrinsic nonlinearity of logic operations inherently obviates the need for external nonlinear functional components. Similarly, the logic neuron in Fig. 1D directly performs the logic operation on the input data. To achieve the target task, it is necessary to train the functions of logic units. Unlike analog ONNs, which operate in continuous domains, the OLCNN is based on discrete logic functions, necessitating specialized training strategies to efficiently explore the solution space. We adopt the backpropagation algorithm to optimize the OLCNN, where each logic unit is regarded as a combination of a weighted summation and a threshold function applied to the input data. The threshold function is given by
| (3) |
Fig. 1. Principle of the OLCNN.
(A) Analog convolution operation with a 3-by-3 convolutional kernel. (B) Analog nine-input neuron. (C) Logic convolution operation with a 3-by-3 logic convolutional kernel. (D) Nine-input logic neuron. (E) Straight-through estimator method of OLCNN. (F) Fundamental operator, OLCO, in the OLCNN based on the optical PLA, which is enabled by joint wavelength-space coding. (G) Detailed optical implementation of wavelength encoding. (H) Detailed optical implementation of spatial encoding. LCK, logic convolutional kernel; LN, logic neuron; STE, straight-through estimator; WSS, wavelength-selective switch; OS, optical switch.
For the nonzero input, the derivative dH(x)/dx is always zero, hindering weight updates. For the zero input, the gradient does not exist. To address this issue, we introduce the straight-through estimator method (46) shown in Fig. 1E. An approximate gradient is assigned to the derivative dH(x)/dx, written as
| (4) |
The straight-through estimator method bypasses the gradient computation of the threshold function, allowing the gradient to flow during backpropagation and enabling the OLCNN to update its weights. After training, we extract corresponding weights and the threshold function of each logic unit and then map them to a specific logic function by iterating through all possible combinations of binary inputs. Alternatively, we can also use gradient-free optimization algorithms, including particle swarm optimization, genetic algorithm, and ant colony optimization, to directly configure each logic unit with prediction accuracy as the guiding metric.
The fundamental operator, OLCO, within the OLCNN is implemented using the optical PLA illustrated in Fig. 1F. Notably, the OLCO functions as both the logic convolutional kernel and logic neuron in the OLCNN. To generate all logic minterms, we exploit both the wavelength and spatial dimensions of light. The input wavelength channels are evenly divided into two parts by the wavelength encoder (WE). One part is allowed to pass when the input signal is Logic 1, whereas the other passes when the input signal is Logic 0. This process assigns the input signal and its complementary counterpart to separate halves of the available wavelength channels. The subsequent WEs further split the wavelength channels with different orthogonal wavelength encoding. Two WEs will map four possible combinations of two binary input signals to four wavelength channels. By continuously cascading the WEs, each wavelength channel of the final output will represent a distinct logic minterm derived from all preceding input signals. Figure 1G illustrates a possible optical implementation of the WE, which is composed of a wavelength-selective switch and a 2-by-1 optical switch. The wavelength-selective switch in WE1 routes the incident wavelengths λ1 and λ2 to the upper port and λ3 and λ4 to the lower port. The following optical switch then selects the corresponding port according to Signal I1. By this means, Signal I1 is encoded onto λ1 and λ2, while its complement is encoded onto λ3 and λ4. The wavelength-selective switch in WE2 uses a different wavelength routing strategy, which outputs λ1 and λ3 from the upper port and λ2 and λ4 from the lower port. After being modulated by Signal I2, each of the four wavelengths will represent a different logic minterm, thus achieving wavelength encoding. Note that the wavelength-selective switch is not limited to a commercial device; other optical modules, like the DI discussed later, can also perform this function. Similarly, the spatial encoder (SE) directs incident light to different spatial routes, making its two ports output the input signal and its complement, respectively. The following SEs further bisect the input light on the basis of the previous stage and map the generated minterms to the designated ports. Figure 1H demonstrates the optical implementation of spatial encoding, where a 1-by-2 optical switch can realize the function of SE1. The optical switch directs whether to output the input light from the upper or lower port on the basis of the input Signal I1. The two output ports are then followed by two optical switches to load Signal I2, which constitute SE2. As a result, the four ports will output four different logic minterms. By combining the wavelength and spatial encoding, the complete set of minterms is produced and distributed over a two-dimensional plane (Fig. 1F) formed by N (N = 2n) wavelength channels and M (M = 2m) spatial channels. This configuration can support up to (m + n)-bit input logic signals. The desired logic function can be realized by selecting and combining the corresponding wavelength and spatial channels. More implementation details can be found in note S1. In addition, the reuse of logic minterms enables concurrent implementation of diverse logic functions through parallel processing, allowing distinct convolution kernels within the same layer to operate simultaneously using identical hardware infrastructure. This parallelized output architecture substantially reduces computational demand while enhancing energy efficiency.
Implementation of the 1-by-3 OLCO
On the basis of the above principles, a 1-by-3 OLCO is first implemented on the LNOI platform, which uses four wavelength channels and two spatial channels. Here, the WEs are constructed with a DI and a Mach-Zehnder modulator (MZM), as shown in Fig. 2A. The DI separates the input wavelength channels to two output ports. The following MZM can select the output ports of DI by changing the routing state. As a result, the MZM can output specific wavelength channels according to the input signal. Two WEs are used to modulate four wavelength channels in the 1-by-3 OLCO. We adjust the free spectral range (FSR) of the DI to modify the grouping of wavelength channels. The first DI divides the input wavelengths into two groups: λ1 and λ3 in one group and λ2 and λ4 in another. The second DI groups λ1 and λ2 together and λ3 and λ4 as another pair. By this means, the four wavelengths each represent a minterm formed by two input signals after being modulated by the two corresponding MZMs. The SE is implemented using an MZM with two output ports. According to the input signal, the output can be directed to a specific port. In the structure of 1-by-3 OLCO, the two output ports of the final MZM each contain four minterms, which constitute the complete set of minterms for three input signals. We use two wavelength-selective switches to select the wavelength minterms and an optical coupler to combine them. Last, the desired logic operation can be realized by on-chip joint coding in wavelength and spatial dimensions. On the basis of this operator, 1-by-3 logical convolution operations can be implemented (Fig. 2B). To ensure an adequate extinction ratio between wavelength channels, the two DIs are configured with FSRs differing by a factor of 24, as illustrated in Fig. 2C. The wavelength channels exhibit extinction ratios exceeding 15 dB, indicating robust wavelength modulation capabilities of the WEs. Characterization of the MZM reveals satisfactory high-speed performance, with an electro-optic bandwidth surpassing 50 GHz (Fig. 2D). The half-wave voltage was measured at 2.5 V through 100-kHz triangular voltage sweep characterization (Fig. 2E), demonstrating favorable modulation efficiency. More details of the LNOI chip are provided in note S2.
Fig. 2. Demonstration of the 1-by-3 optical logic convolution enabled by the OLCO on the LNOI platform.
(A) Schematic diagram of the 1-by-3 OLCO based on the joint coding of wavelength and space. (B) The 1-by-3 optical logic convolution used to predict the next states in ECAs. (C) Transmission spectra of the two DIs used in WEs. (D) Electro-optic response of the MZM. (E) Normalized optical transmission of the MZM as a function of the applied voltage, whose Vπ is 2.5 V. (F and G) Two different cellular evolution processes implemented by the 1-by-3 OLCO. (H) Output waveforms of the two logic convolution functions at a speed of 20 Gbit/s. OC, optical coupler.
We then use the 1-by-3 OLCO to perform the elementary cellular evolution. As a discrete system in both spatial and temporal dimensions, the ECA can generate complex patterns through simple initial states (47). In Fig. 2B, the sliding window extracts three adjacent cells from the one-dimensional cellular sequence, whose states (live or dead) are regarded as the logic inputs (Logic 1 or 0) of the 1-by-3 OLCO. According to ECA rules 30 and 150, we demonstrate two cellular evolution processes shown in Fig. 2 (F and G). Two different patterns are generated from a single live cell after 64 iterations by using the 1-by-3 OLCO, which highlights the potential of logic convolution for complex pattern generation. Figure 2H depicts the high-speed waveforms corresponding to the two ECA rules. We apply the high-speed signal to the MZM’s ground-signal-ground pads through the microwave probe. Limited by the size of probes, only two high-speed signals can be applied to the chip at a time. Accordingly, logic signals at 20 Gbit/s are selectively applied to two of the MZMs, which execute high-speed logic computing. The logic results in Fig. 2H are consistent with the theoretical calculations, indicating the high-speed computing capability of the OLCO.
Implementation of the 2-by-2 OLCO
Given that the transmission of a standard DI exhibits a sinusoidal variation from 0 to 1, it is difficult to achieve a satisfactory extinction ratio for all wavelength channels if the FSRs of two successive DIs differ by a factor of two, resulting in a waste of wavelength resources. To address this issue, we add a microring resonator (MRR) on the short-arm side of the DI. The perimeter of the ring is twice the length difference between the two arms of the DI. The MRR introduces a periodic phase shift in the spectral domain and brings a sharper, box-like spectral response of the DI (48–50). We use this structure as a WE and fabricate the 2-by-2 OLCO with four cascaded WEs on the silicon platform depicted in Fig. 3A. The FSR of the subsequent WE is half that of the previous one. By this means, the OLCO multiplexes 16 wavelength channels within an 8-nm spectral range. We align the modulation spectra of four WEs by adjusting the bias voltages on the thermoelectrodes of MRRs and DIs. The applied voltages are adapted according to the input signal, enabling the WEs to output designated wavelength channels. More details of the SOI chip are provided in note S3. As shown in Fig. 3B, the minterms are mapped to corresponding wavelength channels after each WE. Ultimately, each of the 16 wavelength channels will represent a minterm formed by four input signals. Figure 3C presents the transmission spectra corresponding to 16 different states of four input signals. For each state, only one signal spectral band allows light to pass through. For each transmission band, we select the wavelength corresponding to the maximum extinction ratio as the incident wavelength, marked with a red diamond symbol in Fig. 3C. The extinction ratio among different wavelength channels is about 10 dB. Owing to the nonideal box-like shape of WE’s transmission spectrum, noise peaks emerge in the spectrum of four cascaded WEs, which leads to a degradation of the extinction ratio. The complete set of 16 minterms is mapped to 16 wavelengths after modulation. Target logic operations can be achieved by deploying wavelength-selective switches at the output to filter the desired wavelengths.
Fig. 3. Demonstration of the 2-by-2 OLCO based on the SOI platform.
(A) Schematic diagram of the 2-by-2 OLCO based on the microring-assisted DI structure. (B) Concrete procedure of wavelength encoding with 16 wavelengths. (C) Output spectrum of the fourth WE under 16 different conditions of four input logic signals.
Figure 4A demonstrates the 2-by-2 logic convolution procedure. Four pixels are extracted from the input image by the sliding window and then fed into the OLCO for logic computing. As the window slides, the output of the 2-by-2 OLCO will form the final image processing results. Figure 4B presents three types of logic edge extraction. The first type is horizontal edge extraction, whose logic expression is written as
| (5) |
Fig. 4. Optical logic convolution executed by the 2-by-2 OLCO.
(A) Sketch map of the 2-by-2 logic convolution procedure. (B) Three types of edge extraction implemented by the 2-by-2 OLCO and the corresponding truth tables.
It can be observed that the edges in the horizontal direction are extracted, while the vertical edges are not displayed. The second type is vertical edge extraction, following a similar procedure. The left-side pixels and right-side pixels are each processed with the Logic AND operation, and then the results are processed with the Logic XOR operation, given by
| (6) |
The third type is full-direction edge extraction, written as
| (7) |
which retains the edge information from two mutually perpendicular directions via a Logic OR operation. The experimental results are consistent with the simulations, indicating that the 2-by-2 OLCO correctly executes the intended logic convolution tasks.
Implementation of the OLCNN
The 3-by-3 OLCO is further constructed to implement the OLCNN. Considering the challenges of on-chip implementation, we opted to construct it using discrete components with 256 wavelength channels and two spatial channels. The concrete experimental setup is depicted in fig. S9, and further details can be found in note S4. As the scale expands, it is feasible to realize more complex logic functions. The 3-by-3 OLCO can be used as not only 3-by-3 logic convolutional kernels but also nine-input optical logic neurons, constituting the OLCNN depicted in Fig. 5A. To adapt the images in the MNIST dataset for the OLCNN, we resize them from 28-by-28 to 9-by-9 pixels and then convert them into binary format. The 9-by-9 binary image is first processed by 81 3-by-3 logic convolutional kernels with a stride of 3 pixels. Each of the 81 extracted features is convolved by its corresponding 3-by-3 logic convolutional kernel in the second convolutional layer. The 81 1-by-1 pixels are clustered into nine groups, each of which is processed by the nine-input logic neuron. Last, the output from the hidden layer is fed into four logic neurons to obtain classification results. In the experiment, we implement the OLCNN by repeatedly invoking the 3-by-3 OLCO. The OLCNN is applied to perform two separate four-class classification tasks: classifying {0, 1, 2, 3} and {4, 5, 6, 7}. The training dataset comprises 5000 images per class extracted from the MNIST training dataset. The test dataset comprises 500 images per class extracted from the MNIST test dataset. During training, we use the Adam optimizer (51) to train the OLCNN. Its ability to adapt learning rates and retain gradient history enhances training efficiency and accuracy compared with other methods like stochastic gradient descent. Figure 5 (B and D) shows the training process of two tasks. After 750 training epochs, the accuracy of the test dataset can reach 96.15% for classifying {0, 1, 2, 3} and 94.05% for classifying {4, 5, 6, 7}. The corresponding confusion matrices for 2000 test images are depicted in Fig. 5 (C and E). Despite the information loss incurred during binarization, the OLCNN achieves satisfactory classification accuracy, indicating that high-precision representations are not strictly necessary for effective pattern recognition. These results highlight the potential of the optical OLCNN to perform efficient and accurate inference with minimal computing precision.
Fig. 5. OLCNN based on the 3-by-3 OLCO.
(A) Network structure of the OLCNN. (B) Training process and (C) confusion matrix of the OLCNN for classifying 2000 digits of {0, 1, 2, 3}. (D) Training process and (E) confusion matrix of the OLCNN for classifying 2000 digits of {4, 5, 6, 7}.
Meanwhile, we adjust the OLCNN’s output layer to comprise 10 neurons for the 10-class classification task. The training process and confusion matrix are shown in fig. S10 (note S5). As task complexity increases, the performance of the OLCNN tends to degrade. The accuracy of the test dataset is 78.70%. This decline is attributed to the limited number of logic units in the OLCNN. We then use a deeper OLCNN with more logic units depicted in fig. S11, whose accuracy can reach 88.42%. The compression and binarization of input images inevitably introduce information loss to some extent, limiting further improvement in accuracy. Note that the expanded OLCNN still uses the 3-by-3 OLCO as the basic logic unit. Within the well-designed architecture of the neural network, the existing optical devices can attain higher performance. In addition, the differentiable relaxation method (52) has the potential to be used with the OLCNN, allowing for the realization of more sophisticated inference tasks.
DISCUSSION
Unlike conventional ONNs, our proposed OLCNN constitutes a distinct computing paradigm, which is compatible with modern digital computing architectures. It replaces the weighted summation and nonlinear activation in the analog domain with Boolean logic operations. The binarization of data substantially relaxes the precision requirements of computing, thereby strengthening the optical system’s robustness against perturbations like fabrication errors and thermal drift. Although a lower precision requirement in some AI tasks can enhance the noise tolerance of conventional analog ONNs, the inevitable accumulation of noise as the system expands will ultimately compromise the entire system’s performance. Given that optical computing systems rely on electronic storage, ADCs and DACs are necessary during data conversions between optical and electrical domains. The analog ONNs rely on ADCs and DACs with at least a few bits of precision, where the power consumption cost of high-speed ADCs and DACs is considerable (53, 54). In contrast, the OLCNN eliminates the need for DACs and can operate with the 1-bit ADC (comparator), markedly lowering the latency and complexity of data processing. The energy efficiency of the OLCO is 5.2 TOPS (tera operations per second)/W at the operation speed of 10 Gbit/s, which is improved by more than one order of magnitude compared to optical analog convolution (55–58), as discussed in note S6. With increasing data rates, the power consumption of high-precision electrical processing scales more rapidly, making the energy efficiency advantage of single-precision processing more pronounced. In addition, the intrinsic nonlinearity of logic operations eliminates the need for ONNs to implement nonlinear activation in the photonic or electrical domain, further reducing the power consumption and latency. Through the reuse of generated minterms, the OLCO can simultaneously output multiple logic operation results. It is particularly well suited for scenarios in neural networks where multiple convolution operations are performed on the same input data. These inherent merits of the OLCNN point to its strong prospects in optical computing.
As the basic unit of the OLCNN, the optical PLA can be implemented via both discrete systems and integrated platforms. The number of available wavelength channels largely determines the scale of the PLA. In discrete systems, commercial wavelength-selective switches are directly applied to filter wavelength channels, where a high extinction ratio can be maintained with a narrow wavelength interval in a large spectral range. This high filtering performance makes it possible to multiplex numerous wavelength channels. As for integrated platforms, the four input operands do not represent the upper limit of scalability. The transmission spectrum of the microring-assisted DI can be shaped closer to a box-like shape by incorporating additional microrings (49), which facilitates a denser spacing of multiplexed wavelengths. It is also feasible to broaden the spectral range by reducing the length difference of the two arms. Such strategies allow the on-chip PLA to multiplex more wavelengths. Given a wavelength spacing of 0.125 nm within a 32-nm range, the on-chip PLA is capable of multiplexing 256 wavelengths. Combined with an additional SE, the nine-input PLA can be realized on the chip, enabling the realization of the OLCNN on the integrated platform. Moreover, other dimensions of light like mode and polarization can also be applied to encode the binary input, allowing for the implementation of the larger-scale PLA.
The modulation speed of the MZM has exceeded 50 Gbit/s, clearly outperforming electronic hardware (several Gbit/s). With increasing computational speed, the linearly scaling power consumption of optical devices also offers a distinct advantage over electronic counterparts (36). The high computing speed and energy efficiency of the OLCNN make it well suited for latency-critical, power-constrained edge computing tasks. In scenarios such as autonomous driving, industrial inspection, and unmanned systems, the OLCNN can serve as a terminal optical processor for front-end vision, performing feature extraction and classification directly, thereby shortening the processing pipeline and reducing overall power consumption.
In summary, we demonstrate an OLCNN architecture on the basis of the optical PLA with joint wavelength-space coding. A 1-by-3 OLCO fabricated on the LNOI platform achieves ECA pattern generation, while a microring-assisted DI enables a 2-by-2 OLCO on SOI for image edge extraction. Furthermore, a 3-by-3 OLCO with 256 wavelengths and two spatial channels is implemented, facilitating an OLCNN that attains an average test accuracy of 95.1% on MNIST four-class classification. The OLCNN introduces a digital-compatible optical computing paradigm using Boolean logic, minimizing the precision requirements of ADCs and DACs while enabling high-speed, energy-efficient processing. The digital computing architecture enables efficient nonlinear inference with low-precision demands, redefining optical logic paradigms and offering an alternative pathway to photonic intelligence.
MATERIALS AND METHODS
Chip fabrication
The 1-by-3 OLCO was fabricated on a 600-nm-thick lithium niobate thin film bonded on a 4.7-μm dioxide layer sitting on a silicon substrate. The etching depth of the rib waveguide is 300 nm, whose propagation loss is 0.6 dB/cm. The loss of the edge coupler is about 3 dB. The traveling-wave electrodes of the modulator are implemented using Au, and the direct current bias control electrodes are made of NiCr. The insertion loss of the MZM is 1.5 dB. The 2-by-2 OLCO was fabricated on the SOI platform with a 220-nm-thick silicon top layer and a 2-μm-thick buried oxide. The propagation loss of the single-mode strip waveguide with a width of 450 nm is less than 1.5 dB/cm. The loss of the grating coupler is ~4 dB. The insertion loss of the microring-assisted DI is 1.2 dB from the peak value. The thermal electrodes are made of TiN, and the thin aluminum film is used as the electrical connection to the pads and thermal electrodes. To mitigate the thermal cross-talk, thermal isolation trenches were introduced near the electrodes by etching the SiO2 top cladding and Si substrate. The two chips were packaged with both optical and DC electrical interfaces.
Experimental setup
The dc bias is supplied by the DAC (LTC2688) array with a precision of 1 mV, which is controlled by a field-programmable gate array chip (7K325T). The corresponding spectra of the two chips were acquired by an optical spectrum analyzer (AQ6370B). The thermoelectric coolers are applied to the two chips with a temperature control accuracy of 0.01°C to minimize the impact of environmental temperature fluctuations. As for the radio-frequency test of the LNOI chip, the 40-GHz microwave probes (GGB) were used to load high-speed logic signals, which were generated by a bit pattern generator (SHF BPG 44E). The output optical signals are detected by a photodetector (XPDV2120R) and then recorded by an oscilloscope (Tektronix DSA72004B).
Acknowledgments
Funding:
This work was supported by National Key Research and Development Project of China (2023YFB2806502 received by H.Z.) and National Natural Science Foundation of China (62425504 received by J.D.).
Author contributions:
Conceptualization: H.Z. and W.Z. Methodology: H.Z., S.Z., and W.Z. Investigation: S.Z., W.Z., and J.L. Data curation: J.D., W.Z., and J.L. Visualization: J.D., W.Z., and J.L. Formal analysis: B.W., H.Z., S.Z., and W.Z. Validation: H.Z., J.D., S.Z., and W.Z. Resources: H.Z., J.D., W.Z., and J.L. Funding acquisition: H.Z. and J.D. Project administration: H.Z. and J.D. Supervision: X.Z. Writing—original draft: W.Z. Writing—review and editing: H.Z., J.D., W.Z., Y.W., and J.L.
Competing interests:
The authors declare that they have no competing interests.
Data, code, and materials availability:
All data and code needed to evaluate and reproduce the results in the paper are present in the paper and/or the Supplementary Materials. This study did not generate new materials.
Supplementary Materials
This PDF file includes:
Notes S1 to S6
Figs. S1 to S11
Table S1
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Associated Data
This section collects any data citations, data availability statements, or supplementary materials included in this article.
Supplementary Materials
Notes S1 to S6
Figs. S1 to S11
Table S1
Data Availability Statement
All data and code needed to evaluate and reproduce the results in the paper are present in the paper and/or the Supplementary Materials. This study did not generate new materials.





