Skip to main content
NCBI home page
ACS AuthorChoice logoLink to ACS AuthorChoice
. 2026 Mar 5;8(6):2315–2321. doi: 10.1021/acsaelm.5c02537

Mitigating Plasma Etch-Induced Negative Charge Trapping in 2.7 kV β‑Ga2O3 (001) Trench Schottky Barrier Diodes Using H3PO4 Treatment

Min-Yeong Kim †, Aditya Kundapura Bhat †, Sai Charan Vanjari †,‡, Matthew D Smith †,‡, Martin Kuball †,‡,*
PMCID: PMC13019671  PMID: 41908978

Abstract

Stable β-Ga2O3 (001) trench Schottky barrier diodes (TSBDs) with a Baliga’s figure-of-merit (BFOM) of 0.7 GW cm–2 were demonstrated by reducing the Al2O3/Ga2O3 interface state trap density using a H3PO4 surface treatment during device fabrication. TSBDs with fins oriented along different directions have been studied, wherein devices with [010] fin orientation exhibited a low specific on-resistance (R on,sp) of 11 mΩ cm2 and a breakdown voltage (V br) of up to 2.7 kV with H3PO4 treatment. Reliability testing using sequential voltage stress up to a reverse bias of −1.2 kV showed a degradation in R on,sp by 20% in untreated devices but only by 9% in those with the H3PO4 surface treatment. TCAD simulations confirm that the H3PO4 treatment mitigates the density of negative interface charges, highlighting the effectiveness of the acid treatment in controlling defect-mediated instabilities. Furthermore, high-temperature bias stress tests demonstrated that [010]-oriented TSBDs achieved superior thermal and electrical stability after the treatment, eliminating the 10% R on,sp increase observed in untreated devices. These results establish H3PO4 surface treatment as an effective strategy for enhancing the robustness of β-Ga2O3 power devices under combined thermal and electrical stress.

Keywords: Ga2O3 , trench Schottky barrier diodes, interface traps, H3PO4 treatment, etch damage, bias stress instability, high temperature

graphic file with name el5c02537_0010.jpg

graphic file with name el5c02537_0008.jpg

Introduction

Beta-gallium oxide (β-Ga2O3) has attracted considerable attention for its ability to enable compact and energy-efficient power electronic devices, addressing the increasing power requirements of transportation, computing, and data center applications. − Its ultrawide bandgap (4.9 eV) results in a high critical electric field (8 MV cm–1) and an associated high Baliga’s figure-of-merit (BFOM). − Furthermore, the availability of potentially low-cost single-crystal substrates has positive implications for commercial uptake in mass-market power electronics applications. Recent demonstrations in vertical unipolar Ga2O3 devices include vertical trench Schottky barrier diodes (TSBDs) of up to 4 kV and transistors reaching over 10 kV. Surface field engineering in TSBDs, i.e., reduced surface field (RESURF) designs, is essential to fully exploit the high critical field strength of Ga2O3. Due to the lack of p-type doping in Ga2O3, implementation of conventional RESURF structures though is limited. ,, TSBDs employ trench structures that exploit sidewall metal-oxide-semiconductor (MOS) capacitance to redistribute electric fields, offering a RESURF-like benefit in device performance. ,, However, they introduce MOS interfaces along dry-etched sidewalls, where interface states and etch-induced deep-level defects can degrade turn-on voltage, on-resistance, current collapse, and reliability. − Various approaches have been extensively investigated to eliminate interface states that degrade device operation. Recent studies have reported that vacuum annealing can restore the on-current to levels comparable to pre-etch devices, while atomic nitrogen treatment has been shown to improve breakdown voltage (V br). However, these efforts have focused exclusively on static characteristics at room temperature (RT), without considering device stability under bias stress or high-temperature operating conditions. Furthermore, due to the anisotropic nature of Ga2O3, the orientation of the sidewall relative to the crystallographic axes impacts interface state formation. Previous studies have reported that TSBDs with fins aligned along the [010] direction exhibit a relatively low specific on-resistance (R on,sp), which has been attributed to the favorable crystallographic orientation of the fin sidewalls. , Surface preparation and treatments, such as chemical treatment or postdeposition annealing (PDA), have been used to improve interface quality. − These studies have primarily focused on surfaces that were not dry-etched and have not considered the orientation of gallium oxide. Few studies have attempted to reduce the effect of interface states via chemical treatment, as most acids, such as HCl, H3PO4, HF and HNO3, are typically used as wet etching solutions. − Initial reliability studies on Ga2O3 SBD showed reasonable reliability, , though still some degradation was observed, which needs to be addressed if this technology is to be implemented in real-world applications. In the present work, we investigated the electrical characteristics and reliability of Ga2O3 TSBDs through a comprehensive analysis, where H3PO4 treatment is employed to mitigate etch-induced charge trapping at the MOS interface and to assess its impact on device performance and stability. We first examine the dependence of fin orientation on device stability under repeated low positive-bias stress at RT. Using the most stable fin-oriented TSBDs, we then examined device stability under negative-bias stress of up to −1.2 kV. The impact of negative interface charge density on device performance was further analyzed using simulations, which were compared with the experimental results. Finally, the most stable TSBDs are subjected to repeated current measurements at 150 °C to assess their reliability under harsh thermal conditions.

Experimental Section

Figure shows the fabrication process flow and cross-section of the vertical TSBDs. The devices were fabricated on a (001)-oriented β-Ga2O3 wafer grown from the melt by edge-defined film-fed growth (EFG) with hydride vapor phase epitaxy (HVPE)-grown epitaxial layers from Novel Crystal Technology, Inc. The epitaxial structure consisted of an unintentionally doped 11 μm thick Ga2O3 layer (carrier concentration n ≈ 1.3 × 1016 cm–3) on a Sn-doped (001) Ga2O3 substrate (n ≈ 5.4 × 1018 cm–3, 640 μm thick). After cleaning with acetone, isopropanol, and deionized water, the wafer was treated with piranha solution (1:3 H2O2/H2SO4) to remove surface contaminations. The fins were defined using electron-beam lithography (EBL) with a width and spacing of 1.5 μm, using a SiO2 (150 nm) and Ni (150 nm) hard mask, patterned by inductively coupled plasma reactive ion etching (ICP-RIE) with a BCl3/Ar mixture (aligned to crystallographic orientations, as shown in Figure ) and with an etch depth of 1.4 μm. The Ni mask was then removed by a piranha wet etch process. Samples were subsequently treated with H3PO4 solution (>85% concentration) for 0 or 10 min at RT without agitation, denoted as untreated and H3PO4 treated, respectively. The protective SiO2 layer on the top fin surface was then removed by a buffered oxide etch (BOE). A 160 nm aluminum oxide (Al2O3) dielectric layer was subsequently deposited by plasma-assisted atomic layer deposition using a trimethylaluminum precursor and oxygen plasma and annealed at 500 °C for 10 min in O2. Contact openings were patterned by EBL, and Al2O3 was etched using an ICP-RIE process. Ni/Cr (20/200 nm) was deposited by angled sputtering as the Schottky contact on the top side of the sample, while Ti/Au (20/200 nm) was sputtered as the blanket cathode contact on the back side. Electrical measurements, including off-state stress, were performed using a Keithley 2657A high-voltage source in conjunction with a Keithley 2636B system.

1.

1

Open in a new tab

Schematics of the trench Schottky barrier diode (TSBD) with fabrication process flow and different fin orientations implemented in this study.

Results and Discussion

Figure a presents the repeated forward current density–voltage (J–V) characteristics of the untreated TSBDs under voltage sweeps from 0 to 5 V. The results reveal strong fin-orientation-dependent forward J–V characteristics. Compared to the initial sweep, subsequent measurements exhibit a positive shift in turn-on voltage (V on) of approximately +1.0 and +1.5 V for most orientations. Here, V on is defined at a current density of 1 μA cm–2. Notably, [010]-oriented TSBDs maintain a stable V on near 0.5 V even after repeated measurements, indicating good forward-bias stress stability at RT. Such positive V on shifts are commonly associated with electron trapping at the semiconductor/dielectric interface. , In contrast, Figure b shows that H3PO4-treated TSBDs exhibit significantly reduced V on shifts for [140]- and [120]-oriented TSBDs, after 10 min of surface treatment, while [010]-oriented TSBDs remain unchanged, preserving the highest on/off ratio and a stable V on of 0.6 V. Other orientations of TSBDs ([110], [210], and [100]) still displayed noticeable shifts, even after H3PO4 treatment, albeit smaller than in untreated TSBDs. Figure c summarizes the initial turn-on voltage (V on,initial) values across different fin orientations, revealing that [010]-oriented TSBDs consistently achieve the lowest V on,initial. After H3PO4 treatment, the variation in V on,initial among other orientations becomes less pronounced, suggesting improved interface quality. To quantify forward-bias stress effects, Figure d plots the median ΔV on, which is differential between the fourth and initial measurements. For [120]- and [140]-oriented TSBDs, ΔV on decreases significantly from ∼1.4 to ∼0.3 V after treatment, whereas [010] remains almost unaffected under low-bias stress conditions at RT. Orientation-dependent variations in electrical behavior have been attributed to differences in interface and border trap densities, which govern charge-trapping dynamics. ,, The electrical characteristics suggest that H3PO4 treatment can suppress the effects of surface defects in the TSBDs, potentially mitigating interface states at the Al2O3/Ga2O3 interface. This finding underscores the critical role of crystallographic orientation and surface treatment in enhancing the devices’ forward-voltage-stress reliability.

2.

2

Open in a new tab

Repeated current density–voltage (J–V) characteristics from 0 to 5 V of Ga2O3 TSBDs with different fin orientations: (a) untreated and (b) H3PO4-treated TSBD. (c) V on,initial as a function of fin orientation, untreated and H3PO4 treated. (d) Summary plots of ΔV on vs V on,initial, measured at RT under repeated voltage sweeps from 0 to 5 V. ΔV on denotes the shift in V on between the fourth and the initial measurements.

Figure a shows the linear-scale forward J–V characteristics along with the corresponding R on,sp plots for the best devices from both samples, i.e., TSBDs with [010] fin-orientation, which exhibited the lowest V on under repeated forward voltage sweeps. After H3PO4 treatment, the on-current increased noticeably, resulting in a reduction of R on,sp (defined at a forward bias of 5 V) from approximately 13 ± 0.02 mΩ cm2 for untreated devices to 11 ± 0.01 mΩ cm2 for H3PO4-treated devices. Device-to-device variation was compared across the five devices for each condition. This trend was consistently observed across all measured devices, with 10 devices evaluated for each sample. Off-state characteristics were also evaluated for multiple devices with different fin orientations, and representative results are shown in Figure b. The values of V br exhibited minimal dependence on orientation, consistent with previous reports, but H3PO4 treatment produced a slight improvement. The median V br increased from 2.5 kV for untreated TSBDs to 2.7 kV after H3PO4 treatment, accompanied by reduced variability among devices. The correlation between R on,sp and V br is summarized in Figure c, where [010]-oriented TSBDs, featuring fin sidewalls formed by (100) and ( 1®00) crystallographic planes, consistently demonstrate the lowest R on,sp, while H3PO4-treated samples achieve higher V br. This highlights the significant impact of the H3PO4 treatment on the BCl3 ICP-RIE etched trench sidewall surface that is formed during the fabrication process by ICP-RIE etch. H3PO4 treatment was performed at RT to minimize etch rates and prevent significant changes in fin dimensions. , Cross-sectional scanning electron microscopy (SEM) confirmed that untreated and H3PO4-treated TSBDs exhibit nearly identical fin geometries, with widths of ∼1.5 μm and depths of ∼1.4 μm, as shown in Figure d,e. Despite no significant change in the physical fin structure, the electrical performance showed a clear dependence on H3PO4 treatment. This aligns with existing reports concluding that the on-resistance of TSBDs is influenced not only by the fin geometry but also by charge trapping at the dielectric/semiconductor interface. ,, As a result, the BFOM in [010]-oriented TSBD with H3PO4 treated reaches 0.7 GW cm–2, which is a 45% improvement.

3.

3

Open in a new tab

(a) Representative J–V characteristics and R on,sp of a representative untreated and H3PO4-treated [010]-oriented TSBDs. (b) Breakdown characteristics of Ga2O3 TSBDs with different fin orientations depending on H3PO4 treatment. (c) R on,sp vs breakdown voltage for untreated and H3PO4-treated samples with different fin orientation. Scanning electron microscopy (SEM) images of Ga2O3 TSBDs with [010]-oriented fins for (d) untreated and (e) H3PO4 treated, recorded at a tilt angle of 52° in the SEM with respect to the sample surface; no significant change in fin width is observed after H3PO4 treatment. The fin dimensions are approximately 1.5 μm in width and 1.4 μm in depth under both conditions. The tungsten layer in panels (d,e) was deposited for surface protection during the FIB cross-sectioning of the device structure.

We evaluated device stability using repeated J–V measurements following negative-bias stress, performed on untreated and H3PO4-treated [010]-oriented TSBDs. The current was measured before (initial) and after applying a negative-bias stress voltage for 500 s with a ramp rate of −4 V s–1, followed by remeasurement of the forward J–V characteristics and subsequent repeating of the stress at increasing reverse biases. On-current reduces with increasing bias stress, as shown in Figure a. A larger current degradation was observed for untreated devices compared to that of H3PO4-treated TSBDs. The plot of %ΔR on/R on vs stress and recovery time in Figure b shows a clear trend of increasing specific on-resistance (R on,sp) under negative-bias stress, followed by partial recovery during the relaxation period. After applying a maximum stress bias of −1.2 kV, the R on,sp (defined at a voltage of 5 V) of untreated TSBD increased by 20% relative to its initial value, while H3PO4-treated TSBD showed only a 9% increase. Recovery was evaluated by measuring the forward J–V characteristics after the final stress. Untreated TSBDs exhibited incomplete recovery after 1 h, with 15% increase in R on,sp compared to the initial state. In contrast, the H3PO4-treated TSBDs exhibited only a 3.8% increase with respect to the value measured prior to stress after 1 h, indicating near-complete recovery.

4.

4

Open in a new tab

(a) Forward J–V characteristics of Ga2O3 TSBDs of untreated and H3PO4-treated samples after 500 s stresses at various reverse voltages. Inset: schematics of stress–measurement sequence for negative-bias stress. (b) Percentage of R on change as a function of stress and rest time.

The effect of bias stress on charge trapping can be emulated through the inclusion of fixed charges applied to TSBD device simulations in Silvaco ATLAS. To ensure realistic simulation results, a fin corner curvature of 6.37 × 104 m–1, extracted from the cross-section SEM images, was incorporated into the structure. Changes in J–V characteristics resulting from the inclusion of negative charges on the sidewall and bottom-corner regions of the fin are compared, as shown in Figure a. When charging occurs along the fin sidewalls and corners, the J–V curve exhibits both a positive V on shift and increased R on,sp. Such a trend was observed experimentally with repeated measurements for all fin orientations except the [010]-orientation (Figure ); this highlights the impact of interface trapping on the turn-on properties of TSBDs. When a positive bias is applied to the anode, electrons within the Ga2O3 layer accumulate near the Ga2O3/Al2O3 interface, as Al2O3 is an insulating layer and does not allow for electron penetration. These electrons get trapped at pre-existing interface defects. Consequently, subsequent forward sweeps require a higher positive voltage to counter the effect of the trapped charges, manifesting as a positive V on shift. In contrast, when charging is concentrated at the fin corners, as shown in Figure b, the J–V curve primarily exhibits increased R on,sp without a significant V on shift, as seen experimentally under high reverse bias stress at −1.2 kV in Figure a. Interestingly, the [010]-oriented TSBDs, which exhibit superior stability under low forward-voltage conditions, become vulnerable to trapping only under high negative-bias stress. Although [010]-oriented TSBDs inherently apparently possess fewer interface traps than other orientations, high reverse-bias conditions induce interface charging effects. Electric-field crowding at the bottom corner of the fin far exceeds the field intensity along the sidewalls. , Interface states are present along both the fin sidewalls and the corners. However, the potential difference between the sidewalls and the fin center is small, leading to a smaller electric field that limits the carrier exchange between the anode and these interface states. As a result, most interface states located near the fin corners should effectively be charged. The corresponding energy band diagram under these conditions illustrates the enhanced potential for electron trapping in these localized regions, as shown in Figure c,d.

5.

5

Open in a new tab

(a) Simulated current–voltage characteristics of TSBDs with varying interface charge densities at the sidewall and bottom corner of the fins. The interface charge at the bottom of corner was applied within a 0.2 μm region of the corner along both the x-and y-axes. (b) Simulated electric field distribution at −1.2 kV. Schematic energy band diagram at the (c) sidewall and (d) bottom corner of the fin.

To further explore these findings, trap density was fitted in the TCAD simulation to fit the experimental normalized R on,sp values for [010]-oriented TSBDs, from untreated and H3PO4-treated samples, as shown in Figure . R on,sp increases with both stress voltage and interface charge density in both devices as a function of electric field, although the change is less pronounced in H3PO4-treated TSBDs. Untreated TSBDs show good agreement with simulations assuming an initial interface charge density at the corner of 3 × 1011 cm–2, while H3PO4-treated TSBDs correspond to an initial density of less than 9 × 1010 cm–2. These results confirm our earlier conclusion that H3PO4 treatment can effectively reduce negative interface charges or the border oxide trap at the [010] fin corners, mitigating current degradation.

6.

6

Open in a new tab

Simulated normalized R on,sp, compared to the measurement, as a function of stress voltage for devices (a) untreated and (b) H3PO4 treated by adjusting the interface charge density at fin corners to fit the experimental data.

Having established the most stable operation for the [010]-oriented TSBDs at RT, we also examined their reliability at high temperature (150 °C). Figure a presents the forward-bias characteristics measured at 150 °C, compared to results obtained at RT. Both untreated and H3PO4-treated devices exhibited a reduction in on-current at higher temperatures, which is expected considering the enhanced electron scattering at higher temperatures. , The most notable observation concerns the behavior under repeated forward sweep measurements at a high temperature. Similar to RT testing, H3PO4-treated TSBDs maintain stable performance across multiple bias cycles at 150 °C. In contrast, untreated devices showed a progressive decrease in on-current with each successive measurement, accompanied by V on shift of approximately +0.2 V. A detailed comparison in Figure b reveals that while H3PO4-treated devices exhibit negligible variation between measurements, untreated devices experience a 10% increase in R on,sp after the fourth cycle relative to the initial measurement. This observed degradation aligns with the previously proposed mechanism: repeated bias stress promotes electron trapping at interface states, resulting in a negative charge accumulation. In particular, we note that untreated [010]-oriented TSBDs exhibit an increase in R on,sp at high temperatures, indicating that interface states that have a negligible influence on electrical characteristics under low-voltage stress at RT become thermally activated and accessible for electron trapping at high temperatures, where sufficient thermal energy enables electron trapping and enables negative charging. Such activation of deep-level traps can significantly affect the device parameter, including V on, and R on,sp. For β-Ga2O3 devices, deep-level traps are reported to become active within the temperature range of 146–172 °C, − which can contribute to the observed instability at elevated temperature. Our results indicate that both traps active at RT and high temperatures can be effectively mitigated through H3PO4 treatment. Because the traps require activation energy, their activation occurs at elevated temperatures under combined thermal and electrical stress. As a result, untreated TSBDs have markedly higher instability. Therefore, the impact of H3PO4 treatment on improving stability is even more critical under these harsher conditions to enable robust and reliable device operation.

7.

7

Open in a new tab

(a) Repeated J–V characteristics from 0 to 5 V of Ga2O3 [010]-oriented TSBDs with [010] orientation measured at RT and high temperature (150 °C), with each device measured through successive forward sweeps. (b) Extracted R on,sp for untreated and H3PO4-treated [010]-oriented TSBDs.

Conclusions

We studied the effect of H3PO4 surface treatment on the electrical performance and reliability under high-temperature and bias stressing in β-Ga2O3 TSBDs using measurements and simulations. At RT, the treatment ensured stable operation for [140]- and [120]-oriented TSBDs, while the [010]-oriented TSBD achieves a notable performance increase, with R on,sp reduced from 13 to 11 mΩ cm2 and V br increased from 2.5 to 2.7 kV, resulting in a BFOM of approximately 0.7 GW cm–2. Under sequential voltage stress at reverse bias of up to −1.2 kV, untreated devices exhibited a 26% increase in R on,sp, compared to only 11% in H3PO4-treated devices, and only 1 h was required for near-complete recovery. Furthermore, high-temperature reliability was confirmed at 150 °C, where H3PO4-treated TSBDs retained stable performance across repeated measurements, in contrast to untreated devices that exhibited a 10% R on,sp increase and a positive V on shift. Overall, these findings underscore the importance of controlling interface charges and surface defects through surface treatments during device processing for enabling robust and reliable β-Ga2O3 TSBD operation under combined electrical and thermal stress, paving the way for high-voltage power electronics in harsh environments.

Acknowledgments

This work was supported by the University of Bristol Cleanroom Facility. The authors acknowledge support from the UKRI Innovation and Knowledge Centre (IKC) REWIRE under grant number EP/Z531091/1. M.K. acknowledges the financial support by the Royal Academy of Engineering through the Chair in Emerging Technologies Scheme.

The authors declare no competing financial interest.

References

  1. Higashiwaki M., Kaplar R., Pernot J., Zhao H.. Ultrawide bandgap semiconductors. Appl. Phys. Lett. 2021;118(20):200401. doi: 10.1063/5.0055292. [DOI] [Google Scholar]
  2. Piel, J. J. ; Sowers, E. A. ; Dryden, D. M. ; Asel, T. J. ; Neal, A. T. ; Noesges, B. A. ; Mou, S. ; Green, A. J. . First Demonstration of a Gallium Oxide Power Converter, 2025, IEEE: pp 2419–2425. 10.1109/apec48143.2025.10977426. [DOI] [Google Scholar]
  3. Kumar M., Khandelwal V., Chettri D., Mainali G., García G. I. M., Pan Z., Li X.. High breakdown voltage normally off Ga2O3 transistors on silicon substrates using GaN buffer. Appl. Phys. Lett. 2025;126(19):193505. doi: 10.1063/5.0263220. [DOI] [Google Scholar]
  4. Green A. J., Speck J., Xing G., Moens P., Allerstam F., Gumaelius K., Neyer T., Arias-Purdue A., Mehrotra V., Kuramata A.. et al. β-Gallium oxide power electronics. APL Materials. 2022;10(2):029201. doi: 10.1063/5.0060327. [DOI] [Google Scholar]
  5. Higashiwaki M., Kuramata A., Murakami H., Kumagai Y.. State-of-the-art technologies of gallium oxide power devices. J. Phys. D: Appl. Phys. 2017;50(33):333002. doi: 10.1088/1361-6463/aa7aff. [DOI] [Google Scholar]
  6. Higashiwaki M., Murakami H., Kumagai Y., Kuramata A.. Current status of Ga2O3 power devices. Jpn. J. Appl. Phys. 2016;55(12):1202A1201. doi: 10.7567/jjap.55.1202a1. [DOI] [Google Scholar]
  7. Kim M.-Y., Winchester A. J., Myers A. F., Heilweil E. J., Maimon O., Yang W. C. D., Koo S.-M., Li Q., Pookpanratana S.. Microscopic-scale defect analysis on β-Ga2O3 through microscopy. Appl. Phys. Lett. 2025;126(23):231605. doi: 10.1063/5.0272451. [DOI] [Google Scholar]
  8. Kim M.-Y., Byun D.-W., Lee G.-H., Pookpanratana S., Li Q., Koo S.-M.. Schottky barrier heights and electronic transport in Ga2O3 Schottky diodes. Materials Research Express. 2023;10(7):075902. doi: 10.1088/2053-1591/ace0a4. [DOI] [Google Scholar]
  9. Maimon O., Moser N. A., Liddy K. J., Green A. J., Chabak K. D., Cheung K. P., Pookpanratana S., Li Q.. Measurement and gate-voltage dependence of channel and series resistances in lateral depletion-mode β-Ga2O3 MOSFETs. Semicond. Sci. Technol. 2023;38(7):075016. doi: 10.1088/1361-6641/acdaed. [DOI] [Google Scholar]
  10. Bhat A. K., Vanjari S. C., Smith M. D., Kuball M.. Degradation of on-current in 4 kV β-Ga2O3 trench Schottky barrier diodes under high voltagestep stressing. Appl. Phys. Lett. 2025;127:113501. doi: 10.1063/5.0278110. [DOI] [Google Scholar]
  11. Wakimoto D., Lin C.-H., Ema K., Ueda Y., Miyamoto H., Sasaki K., Kuramata A.. Multi-fin normally-off β-Ga2O3 vertical transistor with a breakdown voltage exceeding 10 kV. Applied Physics Express. 2025;18:106502. doi: 10.35848/1882-0786/ae0d2a. [DOI] [Google Scholar]
  12. Wan J., Wang H., Cheng H., Wang C., Zhang C., Sheng K.. Electric Field Management and Sidewall Leakage Current Suppression of RESURF-mesa for High-Performance Ga2O3 Power Devices. IEEE Trans. Electron Devices. 2025;72:5721–5726. doi: 10.1109/ted.2025.3594329. [DOI] [Google Scholar]
  13. Higashiwaki M., Sasaki K., Kuramata A., Masui T., Yamakoshi S.. Gallium oxide (Ga2O3) metal-semiconductor field-effect transistors on single-crystal β-Ga2O3 (010) substrates. Appl. Phys. Lett. 2012;100(1):013504. doi: 10.1063/1.3674287. [DOI] [Google Scholar]
  14. Roy S., Kostroun B., Cooke J., Liu Y., Bhattacharyya A., Peterson C., Sensale-Rodriguez B., Krishnamoorthy S.. Ultra-low reverse leakage in large area kilo-volt class β-Ga2O3 trench Schottky barrier diode with high-k dielectric RESURF. Appl. Phys. Lett. 2023;123(24):243502. doi: 10.1063/5.0175674. [DOI] [Google Scholar]
  15. Chen Z., Yu X., Zhou J., Mao S., Fu Y., Yan B., Xu R., Kong Y., Chen T., Li Y.. et al. Negative constant voltage stress-induced threshold voltage instability in hydrogen-terminated diamond MOSFETs with low-temperature deposited Al2O3 . Appl. Phys. Lett. 2020;117(13):133501. doi: 10.1063/5.0020136. [DOI] [Google Scholar]
  16. Li, W. ; Nomoto, K. ; Hu, Z. ; Nakamura, T. ; Jena, D. ; Xing, H. G. . Single and Multi-Fin Normally-off Ga2O3 Vertical Transistors with a Breakdown Voltage over 2.6 kV; IEEE, 2019. 10.1109/iedm19573.2019.8993526. [DOI] [Google Scholar]
  17. Marinella M. J., Schroder D. K., Isaacs-Smith T., Ahyi A. C., Williams J. R., Chung G. Y., Wan J. W., Loboda M. J.. Evidence of negative bias temperature instability in 4H-SiC metal oxide semiconductor capacitors. Appl. Phys. Lett. 2007;90(25):253508. doi: 10.1063/1.2748327. [DOI] [Google Scholar]
  18. Dhara S., Dheenan A., Rajan S.. Charge recovery by vacuum annealing in β-Ga2O3 multi-fin trench Schottky barrier diodes. APL Electronic Devices. 2025;1(2):026122. doi: 10.1063/5.0270286. [DOI] [Google Scholar]
  19. Wei S., Hong Z., Li C., Long M., Li Y., Chen Y., Zhang F., Yang W.. Increase fixed charge at Al2O3/Ga2O3 interface for high-performance Ga2O3 trench Schottky barrier diodes by atomic nitrogen treatment. Appl. Phys. Lett. 2025;126(15):152108. doi: 10.1063/5.0254888. [DOI] [Google Scholar]
  20. Hyun-Seop Kim A. K. B., Smith M. D., Kubali M.. Turn-On Voltage Instability of β-Ga2O3 Trench Schottky Barrier Diodes with Different Fin Channel Orientations. IEEE Trans. Electron Devices. 2024;71(6):3609. doi: 10.1109/TED.2024.3393941. [DOI] [Google Scholar]
  21. Kobayashi T., Maeda K., Hara M., Nozaki M., Watanabe H.. Formation of high-quality SiO2/β-Ga2O3 (001) MOS structures: The role of post-deposition annealing. Appl. Phys. Lett. 2025;126(1):012108. doi: 10.1063/5.0245289. [DOI] [Google Scholar]
  22. Zhou H., Alghamdi S., Si M., Qiu G., Ye P. D.. Al2O3/ beta-Ga2O3 (−201) Interface Improvement Through Piranha Pretreatment and Postdeposition Annealing. IEEE Electron Device Lett. 2016;37(11):1411–1414. doi: 10.1109/LED.2016.2609202. [DOI] [Google Scholar]
  23. Hong Y.-H., Zheng X.-F., He Y.-L., Zhang F., Zhang X.-Y., Wang X.-C., Li J.-N., Wang D.-P., Lu X.-L., Han H.-B.. et al. The optimized interface characteristics of β-Ga2O3 Schottky barrier diode with low temperature annealing. Appl. Phys. Lett. 2021;119(13):132103. doi: 10.1063/5.0063458. [DOI] [Google Scholar]
  24. Park S.-R., Lee T.-H., Choi J.-S., Lee H.-W., Chung S.-H., Kim M.-Y., Lee G.-H., Schweitz M. A., Koo S.-M.. Effects of surface ultraviolet/ozone treatment on the electrical characteristics of Pt/Ga2O3/SiC Schottky diodes. Appl. Phys. A: Mater. Sci. Process. 2025;131(3):175. doi: 10.1007/s00339-024-08198-9. [DOI] [Google Scholar]
  25. Lee C., Hite J. K., Mastro M. A., Freitas J. A., Eddy C. R., Kim H.-Y., Kim J.. Selective chemical etch of gallium nitride by phosphoric acid. Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films. 2012;30(4):040602. doi: 10.1116/1.4719528. [DOI] [Google Scholar]
  26. Oshima T., Okuno T., Arai N., Kobayashi Y., Fujita S.. Wet Etching of β-Ga2O3 Substrates. Jpn. J. Appl. Phys. 2009;48(4R):040208. doi: 10.1143/JJAP.48.040208. [DOI] [Google Scholar]
  27. Ohira S., Arai N.. Wet chemical etching behavior of β-Ga2O3 single crystal. physica status solidi c. 2008;5(9):3116–3118. doi: 10.1002/pssc.200779223. [DOI] [Google Scholar]
  28. Feng Y., Zhou H., Alghamdi S., Wasly S., Hao Y., Zhang J.. 1.5 kV β-Ga2O3 vertical Schottky diodes with 58 A surge current and off-state stressing study. Appl. Phys. Lett. 2025;126(18):182101. doi: 10.1063/5.0260146. [DOI] [Google Scholar]
  29. Wahid S., Toprasertpong K., Islam M., Kumar A., Karim M. A. U., Simka H., Philip H. S. W., Pop E.. Role of Oxygen Deficiencies on the Stability of Indium Tin Oxide (ITO) Transistors. IEEE Electron Device Lett. 2025;46(9):1553–1556. doi: 10.1109/led.2025.3587706. [DOI] [Google Scholar]
  30. Doherty J. L.. Capping Layers to Improve the Electrical Stress Stability of MoS2 Transistors. ACS Appl. Mater. Interfaces. 2020;12(31):35698–35706. doi: 10.1021/acsami.0c08647. [DOI] [PMC free article] [PubMed] [Google Scholar]
  31. Wen J., Hao W., Han Z., Wu F., Li Q., Liu J., Liu Q., Zhou X., Xu G., Yang S.. et al. Vertical β-Ga2O3 Power Diodes: From Interface Engineering to Edge Termination. IEEE Trans. Electron Devices. 2024;71(3):1606–1617. doi: 10.1109/TED.2024.3360016. [DOI] [Google Scholar]
  32. Dhara S., Kalarickal N. K., Dheenan A., Rahman S. I., Joishi C., Rajan S.. β-Ga2O3 trench Schottky diodes by low-damage Ga-atomic beam etching. Appl. Phys. Lett. 2023;123(2):023503. doi: 10.1063/5.0151808. [DOI] [Google Scholar]
  33. Benrabah S., Legallais M., Besson P., Ruel S., Vauche L., Pelissier B., Thieuleux C., Salem B., Charles M.. H3PO4-based wet chemical etching for recovery of dry-etched GaN surfaces. Appl. Surf. Sci. 2022;582:152309. doi: 10.1016/j.apsusc.2021.152309. [DOI] [Google Scholar]
  34. Rebollo S., Itoh T., Krishnamoorthy S., Speck J. S.. Heated-H3PO4 etching of (001) β-Ga2O3. Appl. Phys. Lett. 2024;125(1):012102. doi: 10.1063/5.0209222. [DOI] [Google Scholar]
  35. Li W., Nomoto K., Hu Z., Jena D., Xing H. G.. ON-Resistance of Ga2O3 Trench-MOS Schottky Barrier Diodes: Role of Sidewall Interface Trapping. IEEE Trans. Electron Devices. 2021;68(5):2420–2426. doi: 10.1109/TED.2021.3067856. [DOI] [Google Scholar]
  36. Xu H., Zhang J., Gong X.. Optimization of fin-slanted angles for enhanced electrical performance in lateral β-Ga2O3 MOSFETs. Appl. Phys. Lett. 2025;126(1):013505. doi: 10.1063/5.0237715. [DOI] [Google Scholar]
  37. Xiao M., Gao X., Palacios T., Zhang Y.. Leakage and breakdown mechanisms of GaN vertical power FinFETs. Appl. Phys. Lett. 2019;114(16):163503. doi: 10.1063/1.5092433. [DOI] [Google Scholar]
  38. Ke W.-C.. Solid-State Carbon-Doped GaN Schottky Diodes by Controlling Dissociation of the Graphene Interlayer with a Sputtered AlN Capping Layer. ACS Appl. Mater. Interfaces. 2019;11(51):48086–48094. doi: 10.1021/acsami.9b18976. [DOI] [PubMed] [Google Scholar]
  39. Jian Z., Mohanty S., Ahmadi E.. Temperature-dependent current-voltage characteristics of β-Ga2O3 trench Schottky barrier diodes. Appl. Phys. Lett. 2020;116(15):152104. doi: 10.1063/5.0002520. [DOI] [Google Scholar]
  40. Ren Z., Huang H.-C., Lee H., Chan C., Roberts H. C., Wu X., Waseem A., Bhuiyan A. F. M. A. U., Zhao H., Zhu W.. et al. Temperature dependent characteristics of β-Ga2O3 FinFETs by MacEtch. Appl. Phys. Lett. 2023;123(4):043505. doi: 10.1063/5.0159420. [DOI] [Google Scholar]
  41. Polyakov A. Y., Smirnov N. B., Shchemerov I. V., Yakimov E. B., Yang J., Ren F., Yang G., Kim J., Kuramata A., Pearton S. J.. Point defect induced degradation of electrical properties of Ga2O3 by 10 MeV proton damage. Appl. Phys. Lett. 2018;112(3):032107. doi: 10.1063/1.5012993. [DOI] [Google Scholar]
  42. Polyakov A. Y., Smirnov N. B., Shchemerov I. V., Pearton S. J., Ren F., Chernykh A. V., Lagov P. B., Kulevoy T. V.. Hole traps and persistent photocapacitance in proton irradiated β-Ga2O3 films doped with Si. APL Materials. 2018;6(9):096102. doi: 10.1063/1.5042646. [DOI] [Google Scholar]

Articles from ACS Applied Electronic Materials are provided here courtesy of American Chemical Society

RESOURCES